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path: root/llvm/utils/TableGen/CodeGenTarget.cpp
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2006-03-19getEnumName() missed v8i8, v4i16, and v2i32 typesEvan Cheng
llvm-svn: 26869
2006-03-01New vector type v2f32.Evan Cheng
llvm-svn: 26437
2006-02-20Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bitEvan Cheng
packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32). llvm-svn: 26294
2006-01-27PHI and INLINEASM are now builtin instructions provided by Target.tdChris Lattner
llvm-svn: 25673
2006-01-09* Remove instruction fields hasInFlag / hasOutFlag and added SNDPInFlag andEvan Cheng
SNDPOutFlag to DAG nodes. These properties do not belong to target specific instructions. * Added DAG node property SNDPOptInFlag. It's same as SNDPInFlag except it's optional. Used by ret / call, etc. llvm-svn: 25154
2005-12-26Added field noResults to Instruction.Evan Cheng
Currently tblgen cannot tell which operands in the operand list are results so it assumes the first one is a result. This is bad. Ideally we would fix this by separating results from inputs, e.g. (res R32:$dst), (ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding 'let noResults = 1' is the workaround to tell tblgen that the instruction does not produces a result. It works for now since tblgen does not support instructions which produce multiple results. llvm-svn: 25017
2005-12-23* Support for hasInFlag and hasOutFlag (on instructions). Remove nameless FLAGEvan Cheng
support which is fragile. * Fixed a number of bugs. llvm-svn: 24996
2005-12-17Support for read / write from explicit registers with FlagVT type.Evan Cheng
llvm-svn: 24753
2005-12-08* Added an explicit type field to ComplexPattern.Evan Cheng
* Renamed MatchingNodes to RootNodes. llvm-svn: 24636
2005-12-08Added support for ComplexPattern. These are patterns that require C++ patternEvan Cheng
matching code that is not currently auto-generated by tblgen, e.g. X86 addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4. llvm-svn: 24634
2005-12-04* Commit the fix (by Chris) for a tblgen type inferencing bug.Evan Cheng
* Enhanced tblgen to handle instructions which have chain operand and writes a chain result. * Enhanced tblgen to handle instructions which produces no results. Part of the change is a temporary hack which relies on instruction property (e.g. isReturn, isBranch). The proper fix would be to change the .td syntax to separate results dag from ops dag. llvm-svn: 24587
2005-12-01Support multiple ValueTypes per RegisterClass, needed for upcoming vectorNate Begeman
work. This change has no effect on generated code. llvm-svn: 24563
2005-12-01Nuke CodeGenInstruction's ValueType member, it is no longer used.Nate Begeman
llvm-svn: 24556
2005-11-29Add the new vector types to tablegenNate Begeman
llvm-svn: 24514
2005-11-19Initialize this variable on all paths, fixing a crasher in windows. ThanksChris Lattner
to JeffC for pointing this out. llvm-svn: 24426
2005-11-19Teach tblgen about instruction operands that have multiple MachineInstrChris Lattner
operands, digging into them to find register values (used on X86). Patch by Evan Cheng! llvm-svn: 24424
2005-10-28Rename Record::getValueAsListDef to getValueAsListOfDefs, to more accuratelyChris Lattner
reflect what it is. Convert some more code over to use it. llvm-svn: 24072
2005-10-14Do not let getLegalValueTypes return a list with duplicates in itChris Lattner
llvm-svn: 23723
2005-09-14force all instruction operands to be named.Chris Lattner
llvm-svn: 23358
2005-09-14Check that operands have unique names. REJECT instructions with broken operandChris Lattner
lists: only don't parse them if they are entirely missing (sparcv9). llvm-svn: 23355
2005-09-13Add a new Record::getValueAsCode method to mirror the other getValueAs*Chris Lattner
methods. Use it to simplify some code. llvm-svn: 23336
2005-09-08Compute the value types that are natively supported by a target.Chris Lattner
llvm-svn: 23282
2005-08-26spell this rightChris Lattner
llvm-svn: 23099
2005-08-26spell this variable rightChris Lattner
llvm-svn: 23095
2005-08-26Expose a new flag to TargetInstrInfoChris Lattner
llvm-svn: 23094
2005-08-19Split register class "Methods" into MethodProtos and MethodBodiesChris Lattner
llvm-svn: 22928
2005-08-19Read the namespace field from register classesChris Lattner
llvm-svn: 22918
2005-08-19Fix a problem jeffc noticedChris Lattner
llvm-svn: 22903
2005-08-18Figure out how many operands each instruction has, keep track of whetherChris Lattner
or not it's variable. llvm-svn: 22885
2005-04-22Remove trailing whitespaceMisha Brukman
llvm-svn: 21428
2005-01-22Refactor code for numbering instructions into CodeGenTarget.Chris Lattner
llvm-svn: 19758
2005-01-02Expose isConvertibleToThreeAddress and isCommutable bits to the code generator.Chris Lattner
llvm-svn: 19243
2004-10-14* Add option to read isLittleEndianEncoding for InstrInfo classesMisha Brukman
* Doxygen-ify some function comments llvm-svn: 16974
2004-10-03Add initial support for variants. This just parses the new format, noChris Lattner
functionality is added llvm-svn: 16636
2004-09-28Add support for the isLoad and isStore flags, needed by the instruction ↵Nate Begeman
scheduler llvm-svn: 16554
2004-09-28Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAGChris Lattner
llvm-svn: 16553
2004-08-21Alignment is now in bits.Chris Lattner
llvm-svn: 15976
2004-08-21Make alignment be in bits, just like size isChris Lattner
llvm-svn: 15969
2004-08-21Support "Methods" in register classes in CodgeGenRegisterClassChris Lattner
llvm-svn: 15965
2004-08-21Start parsing register classes into a more structured formChris Lattner
llvm-svn: 15961
2004-08-21Read in declared reg sizesChris Lattner
llvm-svn: 15960
2004-08-16Use CodeGenRegister class to make reading in of register information moreChris Lattner
systematic. llvm-svn: 15805
2004-08-14Make the AsmWriter a first-class tblgen object. Allow targets to specifyChris Lattner
name of the generated asmwriter class, and the name of the format string. llvm-svn: 15747
2004-08-11Start parsing more information from the Operand informationChris Lattner
llvm-svn: 15644
2004-08-11Remove special case hacksChris Lattner
llvm-svn: 15643
2004-08-01Parse the operand list of the instruction. We currently support register ↵Chris Lattner
and immediate operands. llvm-svn: 15390
2004-08-01Initial cut at an asm writer emitter. So far, this only handles emission ofChris Lattner
instructions, and only instructions that take no operands at that! llvm-svn: 15386
2004-08-01Add, and start using, the CodeGenInstruction class. This class representsChris Lattner
an instance of the Instruction tablegen class. llvm-svn: 15385
2004-08-01Rename CodeGenWrappers.(cpp|h) -> CodeGenTarget.(cpp|h)Chris Lattner
llvm-svn: 15382
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