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path: root/llvm/utils/TableGen/CodeGenTarget.cpp
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2007-09-28Add sqrt and powi intrinsics for long double.Dale Johannesen
llvm-svn: 42423
2007-09-19Add CopyCost to TargetRegisterClass. This specifies the cost of copying a valueEvan Cheng
between two registers in the specific class. llvm-svn: 42123
2007-08-16Add MVT::fAny for overloading intrinsics on floating-point types.Dan Gohman
llvm-svn: 41128
2007-08-04This is the patch to provide clean intrinsic function overloading support in ↵Chandler Carruth
LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future. This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported. llvm-svn: 40807
2007-07-26Add target independent MachineInstr's to represent subreg insert/extract in ↵Christopher Lamb
MBB's. PR1350 llvm-svn: 40518
2007-07-26Teach TableGen about the new vector types.Christopher Lamb
llvm-svn: 40513
2007-07-20No need for noResults anymore.Evan Cheng
llvm-svn: 40075
2007-07-19Change instruction description to split OperandList into OutOperandList andEvan Cheng
InOperandList. This gives one piece of important information: # of results produced by an instruction. An example of the change: def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; => def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; llvm-svn: 40033
2007-07-13Eliminate an unused parameter.Dan Gohman
llvm-svn: 39828
2007-07-10Try committing again. Add OptionalDefOperand. Remove clobbersPred.Evan Cheng
llvm-svn: 38498
2007-07-06ImmutablePredicateOperand is no more.Evan Cheng
llvm-svn: 37963
2007-07-05Instructions with ImmutablePredicateOperand aren't really predicable since ↵Evan Cheng
their predicates are fixed at isel time. llvm-svn: 37899
2007-06-26Revert the earlier change that removed the M_REMATERIALIZABLE machineDan Gohman
instruction flag, and use the flag along with a virtual member function hook for targets to override if there are instructions that are only trivially rematerializable with specific operands (i.e. constant pool loads). llvm-svn: 37728
2007-06-19Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoadDan Gohman
with a general target hook to identify rematerializable instructions. Some instructions are only rematerializable with specific operands, such as loads from constant pools, while others are always rematerializable. This hook allows both to be identified as being rematerializable with the same mechanism. llvm-svn: 37644
2007-06-19Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.Evan Cheng
llvm-svn: 37643
2007-06-13Add support to tablegen for specifying subregister classes on a per register ↵Christopher Lamb
class basis. llvm-svn: 37572
2007-06-06Add clobbersPred - instruction that clobbers condition code / register which ↵Evan Cheng
are used to predicate instructions. llvm-svn: 37465
2007-06-04Remove the operator<< for MVT::ValueType in preparation for MVT::ValueTypeDan Gohman
being changed from an enum to an integer type, which can't have a custom operator<< overload. llvm-svn: 37412
2007-05-16Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable ↵Evan Cheng
without having a PredicateOperand. llvm-svn: 37116
2007-04-01For PR1297:Reid Spencer
Implement code generation for overloaded intrinsic functions. The basic difference is that "actual" argument types must be provided when constructing intrinsic names and types. Also, for recognition, only the prefix is examined. If it matches, the suffix is assumed to match. The suffix is checked by the Verifier, however. llvm-svn: 35539
2007-03-26Add support for the v1i64 type. This makes better code for this:Bill Wendling
#include <mmintrin.h> extern __m64 C; void baz(__v2si *A, __v2si *B) { *A = C; _mm_empty(); } We get this: _baz: call "L1$pb" "L1$pb": popl %eax movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax movq (%eax), %mm0 movl 4(%esp), %eax movq %mm0, (%eax) emms ret GCC gives us this: _baz: pushl %ebx call L3 "L00000000001$pb": L3: popl %ebx subl $8, %esp movl L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax movl (%eax), %edx movl 4(%eax), %ecx movl 16(%esp), %eax movl %edx, (%eax) movl %ecx, 4(%eax) emms addl $8, %esp popl %ebx ret llvm-svn: 35351
2007-03-19Recognize target instruction flag 'isReMaterializable'.Evan Cheng
llvm-svn: 35159
2007-02-27reapplyChris Lattner
llvm-svn: 34697
2007-02-27Backing outEvan Cheng
CodeGenTarget.cpp updated: 1.82 -> 1.83 Record.cpp updated: 1.55 -> 1.56 Record.h updated: 1.59 -> 1.60 TableGen.cpp updated: 1.47 -> 1.48 It's missing CallingConvEmitter.h llvm-svn: 34693
2007-02-27initial support for calling convention generation, still unfinished.Chris Lattner
llvm-svn: 34682
2007-01-26Files missing from LABEL check in.Jim Laskey
llvm-svn: 33539
2006-12-07What should be the last unnecessary <iostream>s in the library.Bill Wendling
llvm-svn: 32333
2006-12-01Match TargetInstrInfo changes.Evan Cheng
llvm-svn: 32107
2006-11-15Remove the isTwoAddress property from the CodeGenInstruction class. It shouldChris Lattner
not be used for anything other than backwards compat constraint handling. Add support for a new DisableEncoding property which contains a list of registers that should not be encoded by the generated code emitter. Convert the codeemitter generator to use this, fixing some PPC JIT regressions. llvm-svn: 31769
2006-11-15ADd support for adding constraints to suboperandsChris Lattner
llvm-svn: 31748
2006-11-10allow ptr_rc to explicitly appear in an instructions operand list, it doesn'tChris Lattner
have to be a subpart of a complex operand. llvm-svn: 31618
2006-11-07emit TIED_TO correctlyChris Lattner
llvm-svn: 31484
2006-11-06simplify the way operand flags and constraints are handled, making it easierChris Lattner
to extend. llvm-svn: 31481
2006-11-06recognize ppc's blr instruction as predicatedChris Lattner
llvm-svn: 31480
2006-11-04Clean up some code.Evan Cheng
llvm-svn: 31451
2006-11-03eliminate need for the NumMIOperands field in Operand.Chris Lattner
llvm-svn: 31432
2006-11-01Tied-to constraint must be op_with_larger_idx = op_with_smaller_idx or else ↵Evan Cheng
throw an exception. llvm-svn: 31361
2006-11-01Add operand constraints to TargetInstrInfo.Evan Cheng
llvm-svn: 31333
2006-10-11Added properties such as SDNPHasChain to ComplexPattern.Evan Cheng
llvm-svn: 30890
2006-06-15Allow more use of iPTR in patterns.Evan Cheng
llvm-svn: 28790
2006-05-18Don't generate getCalleeSaveReg and getCalleeSaveRegClasses anymore.Evan Cheng
llvm-svn: 28376
2006-05-17TypoEvan Cheng
llvm-svn: 28366
2006-05-17Remove PointerType from target definition. Use abstract type MVT::iPTR toEvan Cheng
represent pointer type. llvm-svn: 28363
2006-05-16Allow patterns to refer to physical registers that belong to multipleEvan Cheng
register classes. llvm-svn: 28323
2006-04-10Fix a typo: Instr* -> Intr*Chris Lattner
llvm-svn: 27568
2006-03-28Only compute intrinsic valuetypes when in a target .td file.Chris Lattner
llvm-svn: 27197
2006-03-28revert this, it breaks things.Chris Lattner
llvm-svn: 27196
2006-03-27Add support for decoding iPTR to the right pointer type.Chris Lattner
llvm-svn: 27188
2006-03-24Make sure to initialize the TheDef field!Chris Lattner
llvm-svn: 27078
2006-03-24Move CodeGenIntrinsic implementation to CodeGenTarget.cpp with the rest ofChris Lattner
the CodeGen* implementations. Parse the MVT::ValueType for each operand of the intrinsics. llvm-svn: 27075
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