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path: root/llvm/test/Transforms/LoopVectorize/RISCV
AgeCommit message (Expand)Author
2025-07-03[VPlan] Don't convert VPWidenSelectRecipes to vp.select in EVL transform (#14...Luke Lau
2025-07-02[VPlan] Emit VPVectorEndPointerRecipe for reverse interleave pointer adjustme...Mel Chen
2025-07-01[VPlan] Support VPWidenIntOrFpInductionRecipes with EVL tail folding (#144666)Luke Lau
2025-06-30[VPlan] Replace all uses of VF when EVL tail folding. NFCI (#146339)Luke Lau
2025-06-25[LV] Update test after 4ac4726d00.Florian Hahn
2025-06-24[LV] Replace redundant ExtractLastElement of reduction result (NFC).Florian Hahn
2025-06-21[VPlan] Use EMIT-SCALAR when printing casts.Florian Hahn
2025-06-20[LV] Consider whether vscale is a known power of two for iteration check (#14...Philip Reames
2025-06-20[LV] Stengthen loop-invariance checks in isPredicatedInst (#140744)Ramkumar Ramachandra
2025-06-19[LLVM][IRBuilder] Use NUW arithmetic for Create{ElementCount,TypeSize}. (#143...Paul Walker
2025-06-18[LoopVectorize] Vectorize fixed-order recurrence with vscale x 1. (#142772)Mel Chen
2025-06-17[VPlan] Expand VPWidenIntOrFpInductionRecipe into separate recipes (#118638)Luke Lau
2025-06-16[RISCV][TTI] Refine reverse shuffle costing for high LMUL (#144155)Philip Reames
2025-06-16[LV] Fix MVE regression from #132190 (#141736)Sam Tebbs
2025-06-15[VPlan] Mark VPFirstOrderRecurrencePHI as not reading/writing memory.Florian Hahn
2025-06-15[LV] Add users to some first-order recurrence tests.Florian Hahn
2025-06-13[LV] Fix test line and regen an autogen testPhilip Reames
2025-06-12[LV] Support scalable interleave groups for factors 3,5,6 and 7 (#141865)Luke Lau
2025-06-10[RISCV][TTI] Allow partial reduce with mismatched extends (#143608)Philip Reames
2025-06-09[VPlan] Add ReductionStartVector VPInstruction. (#142290)Florian Hahn
2025-06-09[RISCV][LV] Add tests for masked interleaved accessPhilip Reames
2025-06-07[VPlan] Use regular phi printing for resume phis.Florian Hahn
2025-06-05[NFC][LLVM][Instrumentation][LoopVectorize] Regenerate test checks.Paul Walker
2025-06-04[LV] Regenerate UTC variable names in RISCV/interleaved-accesses.ll. NFCLuke Lau
2025-06-02[LV] Move VPlan-based calculateRegisterUsage to VPlanAnalysis (NFC). (#135673)Florian Hahn
2025-05-29[VPlan] Use EMIT-SCALAR for single-scalar VPPhis (NFC).Florian Hahn
2025-05-29[VPlan] Use EMIT-SCALAR when printing single-scalar VPInstructions. (#141428)Florian Hahn
2025-05-28[VPlan] Use InstSimplifyFolder instead of TargetFolder (#141222)Ramkumar Ramachandra
2025-05-27[VPlan] Connect Entry to scalar preheader during initial construction. (#140132)Florian Hahn
2025-05-26[LV] Add tests for more interleave group factors on AArch64 and RISC-V. NFCLuke Lau
2025-05-26[RISCV][TTI] Adjust costing in getPartialReductionCost for zvqdotq (#141430)Philip Reames
2025-05-24[VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (#117506)Florian Hahn
2025-05-23[RISCV][TTI] Implement getPartialReductionCost for the vqdotq cases (#140974)Philip Reames
2025-05-21[RISCV][TTI] Add test coverage for getPartialReductionCost [nfc]Philip Reames
2025-05-20[VPlan] Introduce constant folder in simplifyRecipe (#125365)Ramkumar Ramachandra
2025-05-19[LoopVectorizer] Prune VFs based on plan register pressure (#132190)Sam Tebbs
2025-05-14[LV][EVL] Introduce the EVLIndVarSimplify Pass for EVL-vectorized loops (#131...Min-Yih Hsu
2025-05-14[VPlan] Use VPlan operand order for VPBlendRecipes. (#139475)Florian Hahn
2025-05-10[VPlan] Use printPhiOperands for VPPhi.Florian Hahn
2025-05-08[VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRe...Luke Lau
2025-05-06[LV][EVL] Attach a new metadata on EVL vectorized loops (#131000)Min-Yih Hsu
2025-04-28Reapply "[VPlan] Fold NOT into predicate of wide compares." (#130347)Florian Hahn
2025-04-27[RISCV] Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (#135727)YunQiang Su
2025-04-25[VPlan] Replace ExtractFromEnd with Extract(Last|Penultimate)Element (NFC). (...Florian Hahn
2025-04-21[VPlan] Also duplicated scalar-steps when it enables sinking scalars. (#136021)Florian Hahn
2025-04-17[VPlan] Simplify vp.merge true, (or x, y), x -> vp.merge y, true, x (#135017)Luke Lau
2025-04-14[LV] Add test cases for reverse accesses involving irregular types. nfc (#135...Mel Chen
2025-04-12[LAA] Make sure MaxVF for Store-Load forward safe dep distances is pow2.Florian Hahn
2025-04-10[VPlan] Introduce VPInstructionWithType, use instead of VPScalarCast(NFC) (#1...Florian Hahn
2025-04-08[LV] Compute register usage for interleaving on VPlan. (#126437)Florian Hahn
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