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AgeCommit message (Expand)Author
2025-07-03[PHIElimination] Revert #131837 #146320 #146337 (#146850)Guy David
2025-07-03[RISCV] Added the MIPS prefetch extensions for MIPS RV64 P8700. (#145647)UmeshKalappa
2025-07-03[RISCV] Add isel patterns for generating XAndesPerf branch immediate instruct...Jim Lin
2025-07-02[RISCV] Add additional gather/scatter addressing coveragePhilip Reames
2025-07-02[SDAG] Prefer scalar for prefix of vector GEP expansion (#146719)Philip Reames
2025-07-03[RISCV][VLOPT] Support v[f]slide1up.v{x,f} (#146716)Luke Lau
2025-07-02[RISCV][VLOPT] Support vslide{up,down} (#146710)Luke Lau
2025-07-02[RISCV][VLOPT] Add support for vfmerge.vfm and vfmv.v.f (#146692)Luke Lau
2025-07-02[InstrEmitter] Use AddOperand in EmitCopyToRegClassNode. (#146637)Craig Topper
2025-07-02[DAG] visitFREEZE - always allow freezing multiple operands (#145939)Simon Pilgrim
2025-07-01[RISCV] Fix typo in header of llvm/test/CodeGen/RISCV/rvv/select-fp.ll. NFC.Jim Lin
2025-07-01[RISCV] Add LLVM IR intrinsicis vrgatherei16/vslideup/vslidedown support for ...Jim Lin
2025-07-01[RISCV][MC] Support Base P non-GPR pair instructions (#137927)realqhc
2025-06-30[RISCV] Add coverage for missed scalarization of gather/scatter base pointersPhilip Reames
2025-06-30[ISel/RISCV] Fix fixed-vector [l]lrint lowering (#145898)Ramkumar Ramachandra
2025-06-29[PHIElimination] Reuse existing COPY in predecessor basic block (#131837)Guy David
2025-06-27[SelectionDAG] Combine range metadata when loads are CSEd. (#146026)Craig Topper
2025-06-27[DAG] canCreateUndefOrPoison - add handling for ISD::SELECT (#146046)Simon Pilgrim
2025-06-27[RISCV] Add ISel patterns for Qualcomm uC Xqcicm extension (#145643)quic_hchandel
2025-06-27[RISCV] Add nds.bfos and nds.bfoz for the short forward branch optimization. ...Jim Lin
2025-06-26[CodeGen/RISCV] Add fixed-vector [l]lround tests (#145926)Ramkumar Ramachandra
2025-06-26[RISCV] Move CascadeSelect test into float/half/double-select-fcmp.ll. NFCCraig Topper
2025-06-25[RISCV] Use SelectAddrRegRegScale for Xqcisls instructions. (#145608)Craig Topper
2025-06-25[RISCV] Add more test cases for Xqcisls scaled load store instructions. NFCCraig Topper
2025-06-25[RISCV] Fix typo in the description of xsfvfwmaccqqq. (#145771)Craig Topper
2025-06-25[RISCV] Support fixed vector vp.reverse/splice with Zvfhmin/Zvfbfmin. (#145596)Craig Topper
2025-06-25[RISCV] Remove -mattr=+no-rvc-hints (#145138)Craig Topper
2025-06-25[RISCV] Try to optimize `vp.splice` to `vslide1up`. (#144871)Ming Yan
2025-06-25[IA] Remove recursive [de]interleaving support (#143875)Luke Lau
2025-06-24[RISCV] Fix a correctness issue in optimizeCondBranch. Prevent optimizing com...Craig Topper
2025-06-24[RISCV] Support scalable vector vp.reverse/splice with Zvfhmin/Zvfbfmin. (#14...Craig Topper
2025-06-24[RISCV] Add Zvfh scalable vector vp.splice tests. NFCCraig Topper
2025-06-24[RISCV] Optimize vp.splice with 0 offset. (#145533)Craig Topper
2025-06-24[RISCV] Support LLVM IR intrinsics for XAndesVBFHCvt (#145321)Jim Lin
2025-06-24[RISCV] Add ISel pattern for generating QC_BREV32 (#145288)Sudharsan Veeravalli
2025-06-23[DAGCombiner][RISCV] Don't propagate the exact flag from udiv/sdiv to urem/sr...Craig Topper
2025-06-23[RISCV] Add Zvfh tests for vp.splice. NFCCraig Topper
2025-06-23[RISCV] Add vp.reverse tests for Zvfh and fractional lmuls. NFCCraig Topper
2025-06-23[SelectionDAG][RISCV] Add support for splitting vp.splice (#145184)Craig Topper
2025-06-23CodeGen: Emit error if getRegisterByName fails (#145194)Matt Arsenault
2025-06-21[SelectionDAG][RISCV] Treat zext nneg as sext in PromoteIntOp_ZERO_EXTEND if ...Craig Topper
2025-06-21Re-commit "[RISCV] Properly support RISCVISD::LLA in getTargetConstantFromLoa...Craig Topper
2025-06-21Revert "[RISCV] Properly support RISCVISD::LLA in getTargetConstantFromLoad. ...Craig Topper
2025-06-21[RISCV] Properly support RISCVISD::LLA in getTargetConstantFromLoad. (#145112)Craig Topper
2025-06-20[RISCV] Allow larger offset when matching build_vector as vid sequence (#144756)Philip Reames
2025-06-20[RISCV] Treat bf16->f32 as separate ExtKind in combineOp_VLToVWOp_VL. (#144653)Craig Topper
2025-06-20[CodeGen] Limit number of analyzed predecessorsAlexis Engelke
2025-06-19[SelectionDAG][RISCV] Preserve nneg flag when folding (trunc (zext X))->(zext...Craig Topper
2025-06-19[RISCV] Don't prefer QC_EXT for SEXT_INREG patterns when Zbb is enabled (#144...Sudharsan Veeravalli
2025-06-19[RISCV] Fix a bug where AVL is the last MI in MBB. (#144668)MingYan
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