| Age | Commit message (Expand) | Author |
|---|---|---|
| 2023-10-09 | Revert "[CodeGen] Really renumber slot indexes before register allocation (#6... | Jay Foad |
| 2023-10-09 | [CodeGen] Really renumber slot indexes before register allocation (#67038) | Jay Foad |
| 2023-09-15 | [RA] Split a virtual register in cold blocks if it is not assigned preferred ... | Guozhi Wei |
| 2023-09-08 | [PowerPC] Define SchedModel for Power8 | Qiu Chaofan |
| 2022-11-14 | [PowerPC] make expensive mflr be away from its user in the function prologue | Chen Zheng |
| 2022-10-11 | [PPC] Opaque pointer migration, part 1. | Kai Nacke |
| 2022-08-19 | [PowerPC] Fix bugs in sign-/zero-extension elimination | Stefan Pintilie |
| 2019-12-26 | [PowerPC] Modify the hasSideEffects of MTLR and MFLR from 1 to 0 | Kang Zhang |
| 2019-09-20 | [NFC][PowerPC] Consolidate testing of common linkage symbols | Jinsong Ji |
| 2019-08-26 | [NFC][Regalloc] Add testcases for D66576 | Zi Xuan Wu |
