| Age | Commit message (Expand) | Author |
|---|---|---|
| 2023-09-08 | [PowerPC] Define SchedModel for Power8 | Qiu Chaofan |
| 2022-07-08 | [SDAG] try to replace subtract-from-constant with xor | Sanjay Patel |
| 2021-01-18 | [PowerPC] [NFC] Add AIX triple to some regression tests | Qiu Chaofan |
| 2020-04-16 | [PowerPC] Ignore implicit register operands for MCInst | Kang Zhang |
| 2019-06-26 | Teach the DAGCombine to fold this pattern(c1 and c2 is constant). | QingShan Zhang |
| 2019-02-07 | [DAGCombiner] fold add/sub with bool operand based on target's boolean contents | Sanjay Patel |
| 2018-06-24 | [DAGCombiner] eliminate setcc bool math when input is low-bit of some value | Sanjay Patel |
| 2018-06-22 | [PowerPC] add more tests for bit hacking opportunities with setcc; NFC | Sanjay Patel |
| 2018-06-22 | [PowerPC] add tests for bit hacking opportunities with setcc; NFC | Sanjay Patel |
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index : llvm-project.git | |
| Unnamed repository; edit this file 'description' to name the repository. | thomasg |
| summaryrefslogtreecommitdiff |