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path: root/llvm/test/CodeGen/Mips
AgeCommit message (Expand)Author
2025-07-02[DAG] Refactor X86 combineVSelectWithAllOnesOrZeros fold into a generic DAG C...woruyu
2025-06-25[MIPS][MSA] compare_float.ll - regenerate checksSimon Pilgrim
2025-06-15MC: Adjust -show-inst output for MCExprFangrui Song
2025-06-11Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .setFangrui Song
2025-06-06[Mips] When emit instruction, ignore JUMP_TABLE_DEBUG_INFO (#139830)yingopq
2025-06-04expandFMINIMUMNUM_FMAXIMUMNUM: Quiet is not needed for NaN vs NaN (#139237)YunQiang Su
2025-05-30[MIPS] Reland Add FeatureMSA to i6400 and i6500 cores (#134985) (#141730)Mallikarjuna Gouda
2025-05-30CodeGen: Convert some assorted errors to use reportFatalUsageError (#142031)Matt Arsenault
2025-05-30Mips/X86: Use reportFatalUsageError for subtarget construction errors (#142028)Matt Arsenault
2025-05-24MIPS: Add 64r2 test to CodeGen/fp-maximumnum-minimumnum.ll (#141218)YunQiang Su
2025-05-16[COFF][Mips] Set PrivateGlobalPrefix to .L (#140033)yingopq
2025-05-15CodeGen: Add ISD::AssertNoFPClass (#138839)YunQiang Su
2025-05-14[Mips] Add support of MipsInstrInfo::getNop() (#139863)yingopq
2025-05-14[MIPS]Fix QNaNs in the MIPS legacy NaN encodings (#139829)anbbna
2025-05-09MIPSr6: Set FMAXNUM and FMINNUM as Legal (#139009)YunQiang Su
2025-05-08Revert "[MIPS] Add FeatureMSA to i6400 and i6500 cores (#134985)"Kirill Stoimenov
2025-05-07[MIPS] Add FeatureMSA to i6400 and i6500 cores (#134985)Mallikarjuna Gouda
2025-05-07[MIPS]Remove unnecessary SLL instructions on MIPS64el (#109386)anbbna
2025-04-30Revert "CodeGen: Add ISD::AssertNoFPClass (#135946)"YunQiang Su
2025-04-25[Mips] Do not emit instruction teq if divisor is non-zero immediate value in ...yingopq
2025-04-25CodeGen: Add ISD::AssertNoFPClass (#135946)YunQiang Su
2025-04-16[Mips] Fix clang crashes when compiling a variadic function while targeting m...yingopq
2025-03-30[MC] Don't print () around $ namesFangrui Song
2025-03-29MIPS: Set EnableLoopTermFold (#133454)YunQiang Su
2025-03-28Revert "MIPS: Set EnableLoopTermFold (#133378)"Weaver
2025-03-28MIPS: Set EnableLoopTermFold (#133378)YunQiang Su
2025-02-20[Mips] Reserve hardware register HWR2 (#127775)yingopq
2025-02-19[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)Nikita Popov
2025-02-18LLVM/Test: Mark Mips readcyclecounter.ll XFAIL: expensive_checks (#127587)YunQiang Su
2025-02-18[Mips] Support llvm.readcyclecounter intrinsic (#127553)yingopq
2025-02-11Revert "[Mips] Support llvm.readcyclecounter intrinsic (#114953)"YunQiang Su
2025-02-11[Mips] Support llvm.readcyclecounter intrinsic (#114953)yingopq
2025-02-06[Mips] Use getSignedConstant() in or combineNikita Popov
2025-02-03[DAG] getNode - convert scalar i1 arithmetic calls to bitwise instructions (#...Simon Pilgrim
2025-01-31[LegalizeDAG] Use Base+Offset instead of Offset+Base for jump tablesAlexander Richardson
2025-01-31[MIPS] Autogenerate a jump tables testAlex Richardson
2025-01-24[Mips] Add the missing judgment when processing function handleMFLOSlot (#121...yingopq
2025-01-24[MIPS] [MSA] Widen v2i8, v216 and v2i32 vectors (#123040)Cinhi Young
2025-01-21[Mips] Handle declspec(dllimport) on mipsel-windows-* triples (#120912)Hervé Poussineau
2025-01-21[MIPS][MSA] Invert operand order of `ILVOD` when lowering `VECTOR_SHUFFLE` (#...Cinhi Young
2025-01-20[Mips] Fix compiler crash when returning fp128 after calling a functi… (#11...yingopq
2024-12-20[MC][Mips] Add MipsWinCOFFObjectWriter/MipsWinCOFFStreamer (#114611)Hervé Poussineau
2024-12-14[test] Remove redundant -march= in llc -mtriple=Fangrui Song
2024-12-12[GISel] Support narrowing G_ICMP with more than 2 parts. (#119335)Craig Topper
2024-12-10[test] Change llc -march=mips* to -mtriple=mips*Fangrui Song
2024-11-21[MachineLICM] Don't allow hoisting invariant loads across mem barrier. (#116987)Florian Hahn
2024-11-19[MIPS] Updated MIPS N calling conventions so that fp16 arguments no longer ca...Davide
2024-11-06[MIPS] LLVM data layout give i128 an alignment of 16 for mips64 (#112084)yingopq
2024-11-05[DAG] visitAND - Fold (and (srl X, C), 1) -> (srl X, BW-1) for signbit extrac...Simon Pilgrim
2024-11-05[MIPS] Use softPromoteHalf legalization for fp16 rather than PromoteFloat (#1...yingopq
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