| Age | Commit message (Expand) | Author |
|---|---|---|
| 2024-06-07 | [ARM] Add support for Cortex-R52+ (#94633) | Jonathan Thackray |
| 2018-04-27 | [ARM] Enable misched for R52. | David Green |
| 2017-12-04 | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih |
| 2017-06-28 | [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). | Kristof Beyls |
| 2017-05-25 | CodeGen: Rename DEBUG_TYPE to match passnames | Matthias Braun |
| 2016-11-15 | [ARM] Add machine scheduler for Cortex-R52 | Javed Absar |
 |
index : llvm-project.git | |
| Unnamed repository; edit this file 'description' to name the repository. | thomasg |
| summaryrefslogtreecommitdiff |