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path: root/llvm/test/CodeGen/AMDGPU
AgeCommit message (Expand)Author
2025-01-08AMDGPU: Reduce 64-bit add width if low bits are known 0 (#122049)Matt Arsenault
2025-01-08AMDGPU: Add baseline test for add64 with constant test (#122048)Matt Arsenault
2025-01-07AMDGPU: Use getSignedTargetConstant for ImmOffset in SelectScratchSVAddr (#12...Changpeng Fang
2025-01-07[AMDGPU][True16][CodeGen] true16 codegen pattern for v_med3_u/i16 (#121850)Brox Chen
2025-01-07AMDGPU: Forcibly disable verifier in testMatt Arsenault
2025-01-07[AMDGPU][True16][MC] true16 for v_minmax/maxmin_f16 and v_minmax/maxmin_num_f...Brox Chen
2025-01-07[AMDGPU] Do not fold into v_accvpr_mov/write/read (#120475)bcahoon
2025-01-07[AMDGPU] Calculate getDivNumBits' AtLeast using bitwidth (#121758)choikwa
2025-01-07RegisterCoalescer: Fix assert on remat to copy-to-physreg with subregs (#121734)Matt Arsenault
2025-01-07RegAllocGreedy: Un-disable test in expensive_checks buildsMatt Arsenault
2025-01-07AMDGPU: Mark test as XFAIL in expensive_checks buildsMatt Arsenault
2025-01-07AMDGPU: Fix assert on physreg MUBUF rsrc operand (#120815)Matt Arsenault
2025-01-06[AMDGPU][True16][MC] true16 for v_fma_f16 (#119477)Brox Chen
2025-01-06[AMDGPU] Remove Dwarf encodings for subregisters (#117891)Emma Pilkington
2025-01-06RegAllocGreedy: Fix use after free during last chance recoloring (#120697)Matt Arsenault
2025-01-06[X86] Support lowering of FMINIMUMNUM/FMAXIMUMNUM (#121464)Phoebe Wang
2025-01-06[AMDGPU] [GlobalIsel] Combine Fmul with Select into ldexp instruction. (#120104)Vikash Gupta
2025-01-06[AMDGPU] Support divergent sized dynamic alloca (#121148)Aaditya
2025-01-06DAG: Fix assuming f16 is the only 16-bit fp type in concat vector combine (#1...Matt Arsenault
2025-01-03[AMDGPU][True16][MC] true16 for v_rndne_f16 (#120691)Brox Chen
2025-01-03 [AMDGPU][True16][MC] true16 for v_cos_f16 (#120639)Brox Chen
2025-01-03[AMDGPU][True16][MC] true16 for v_fract_f16 (#120647)Brox Chen
2025-01-03[AMDGPU][MC] Allow null where 128b or larger dst reg is expected (#115200)Jun Wang
2025-01-03[AMDGPU][True16][MC] true16 for v_frexp_mant_f16 (#120653)Brox Chen
2025-01-03[AMDGPU][True16][MC] true16 for v_sin_f16 (#120692)Brox Chen
2025-01-03[AMDGPU][True16][MC] disable incorrect VOPC t16 instruction (#120271)Brox Chen
2025-01-03[AMDGPU][True16][MC] true16 for v_trunc_f16 (#120693)Brox Chen
2025-01-03[AMDGPU][True16[MC] true16 for v_max3/min3_num_f16 (#121510)Brox Chen
2025-01-02RegAllocGreedy: Add dummy priority advisor for writing MIR tests (#121207)Matt Arsenault
2025-01-01[AMDGPU] Pre-commit tests for "lshr + mad" fold (#119509)Vikram Hegde
2024-12-23[AMDGPU] Add some more GFX12 test coverage (#120581)Jay Foad
2024-12-23[AMDGPU] Remove amdgpu-no-heap-ptr and amdgpu-no-lds-kernel-id attributes fro...Chaitanya
2024-12-20[AMDGPU] Update base addr of dyn alloca considering GrowingUp stack (#119822)Aaditya
2024-12-20[AMDGPU][True16][MC] V_MED3_I/U16_fake16 CodeGen pattern (#120600)Brox Chen
2024-12-20AMDGPU: Fix mishandling of search for constantexpr addrspacecasts (#120346)Matt Arsenault
2024-12-19[AMDGPU] Emit S_CBRANCH_SCC for floating-point conditions. (#120588)Konstantina Mitropoulou
2024-12-18[AMDGPU][MC] Disallow op_sel in some VOP3P dot instructions (#100485)Jun Wang
2024-12-18[AMDGPU][True16][MC] true16 for v_pack_b32_f16 (#119630)Brox Chen
2024-12-18Reapply "[NFC][AMDGPU] Pre-commit clang and llvm tests for dynamic allocas" (...Aaditya
2024-12-18[TableGen][GISel] Import more "multi-level" patterns (#120332)Sergei Barannikov
2024-12-18[AMDGPU] Modify Dyn Alloca test to account for Machine-Verifier bug (#120393)Aaditya
2024-12-18Revert "[NFC][AMDGPU] Pre-commit clang and llvm tests for dynamic allocas" (#...Aaditya
2024-12-18[NFC][AMDGPU] Pre-commit clang and llvm tests for dynamic allocas (#120063)Aaditya
2024-12-18[AMDGPU] Make max dwords of memory cluster configurable (#119342)Ruiling, Song
2024-12-17[AMDGPU][SIPreEmitPeephole] Fix mustRetainExeczBranch (#120121)Mirko Brkušanin
2024-12-17RegAllocFast: Avoid using temporary DiagnosticInfo (#120184)Matt Arsenault
2024-12-17AMDGPU: Delete spills of undef values (#119684)Matt Arsenault
2024-12-16[CodeGen] Disable ran-out-of-registers-error* tests (#120142)Thurston Dang
2024-12-16AMDGPU: Do not assert on unhandled types when demangling libcalls (#120068)Matt Arsenault
2024-12-16[AMDGPU][AMDGPURegBankInfo] Map S_BUFFER_LOAD_XXX to its corresponding BUFFER...Juan Manuel Martinez Caamaño
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