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path: root/llvm/test/CodeGen/AMDGPU/memory_clause.ll
AgeCommit message (Expand)Author
2025-04-18AMDGPU: Mark workitem ID intrinsics with range attribute (#136196)Matt Arsenault
2025-03-18[SeparateConstOffsetFromGEP] Don't set unsound inbounds flag (#130616)Fabian Ritter
2025-03-13AMDGPU: Replace some float undef test uses with poison (#131090)Matt Arsenault
2025-03-12AMDGPU: Replace insertelement poison with insertelement undef (#130896)Matt Arsenault
2024-11-08Reapply "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#...Shilei Tian
2024-11-08Revert "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#1...Shilei Tian
2024-11-08[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)Shilei Tian
2024-07-23[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)Christudasan Devadasan
2024-07-15Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and fol...Matt Arsenault
2024-07-14Revert "AMDGPU: Move attributor into optimization pipeline (#83131)" and foll...dyung
2024-07-14AMDGPU: Move attributor into optimization pipeline (#83131)Matt Arsenault
2024-07-03[test] Remove immarg parameter attribute from calls (#97432)Jay Foad
2024-02-09[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)Diana Picus
2024-01-16[AMDGPU,test] Change llc -march= to -mtriple= (#75982)Fangrui Song
2023-11-29[AMDGPU] Folding imm offset in more cases for scratch access (#70634)Ruiling, Song
2023-07-04[AMDGPU] Do not wait for vscnt on function entry and returnJay Foad
2023-03-09Fix VGPR + offset Scratch offset foldingPetar Avramovic
2022-12-19[AMDGPU] Convert some tests to opaque pointers (NFC)Nikita Popov
2022-07-30[AMDGPU] Extend SILoadStoreOptimizer to s_load instructionsCarl Ritson
2022-04-22AMDGPU: Directly implement computeKnownBits for workitem intrinsicsMatt Arsenault
2022-02-11[AMDGPU] Make enable-flat-scratch a subtarget featureSebastian Neubauer
2022-01-26[LSV] Vectorize loads of vectors by turning it into a larger vectorBenjamin Kramer
2021-12-04AMDGPU: Enable fixed function ABI by defaultMatt Arsenault
2021-12-01[AMDGPU] Set most sched model resource's BufferSize to oneAustin Kerbow
2021-11-24[AMDGPU] Only allow implicit WQM in pixel shadersCarl Ritson
2021-09-14[AMDGPU] Switch PostRA sched to MachineSchedJoe Nash
2021-07-14[AMDGPU] Init scratch only if necessarySebastian Neubauer
2021-04-26[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impactsBaptiste Saleil
2021-02-26AMDGPU: Use kill instruction to hint soft clause live rangesMatt Arsenault
2021-01-12[AMDGPU] Fix failing assert with scratch ST modeSebastian Neubauer
2020-11-16AMDGPU: Select global saddr mode from SGPR pointerMatt Arsenault
2020-10-27[amdgpu] Enable use of AA during codegen.Michael Liao
2020-10-20[AMDGPU] Avoid inserting noops during schedulingAustin Kerbow
2020-09-23Revert "[AMDGPU] Insert waitcnt after returning from call"Sebastian Neubauer
2020-09-23[AMDGPU] Insert waitcnt after returning from callSebastian Neubauer
2020-09-14[AMDGPU] Don't cluster storesJay Foad
2020-08-17AMDGPU: Match global saddr addressing modeMatt Arsenault
2020-08-15AMDGPU: Remove SIFixupVectorISel passMatt Arsenault
2020-07-17[MachineScheduler] Fix the TopDepth/BotHeightReduce latency heuristicsJay Foad
2020-07-17Revert "[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ...hsmahesha
2020-06-24[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops clus...Your Name
2020-06-09Revert "[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ...hsmahesha
2020-06-09[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops clus...hsmahesha
2020-05-05[AMDGPU] Better support for VMEM soft clauses in GCNHazardRecognizerJay Foad
2020-03-19[AMDGPU] Add Scratch Wave Offset to Scratch Buffer Descriptor in entry functionsScott Linder
2020-01-24[AMDGPU] Bundle loads before post-RA schedulerStanislav Mekhanoshin
2019-08-23[AMDGPU] Automatically generate various tests. NFCAmaury Sechet
2018-11-30[AMDGPU] Disable SReg Global LD/ST, perf regressionRon Lieberman
2018-11-16[AMDGPU] Add FixupVectorISel pass, currently Supports SREGs in GLOBAL LD/STRon Lieberman
2018-07-16run post-RA hazard recognizer pass lateMark Searles
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