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path: root/llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
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2025-08-27[AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gf...Shoreshen
2025-07-23[RFC][NFC][AMDGPU] Remove `-verify-machineinstrs` from `llvm/test/CodeGen/AMD...Shilei Tian
2025-07-21[AMDGPU] Enable FWD_PROGRESS bit for GFX10+ on PAL (#139895)Jay Foad
2025-06-13Revert "[AMDGPU] Skip register uses in AMDGPUResourceUsageAnalysis (#… (#14...Diana Picus
2025-06-03[AMDGPU] Skip register uses in AMDGPUResourceUsageAnalysis (#133242)Diana Picus
2025-05-28MachineScheduler: Reset next cluster candidate for each node (#139513)Ruiling, Song
2025-04-15[AMDGPU] Remove the AnnotateKernelFeatures pass (#130198)Jun Wang
2025-03-13AMDGPU: Replace ptr addrspace(3) undef in tests with poison (#131049)Matt Arsenault
2025-03-13AMDGPU: Replace ptr addrspace(1) undefs with poison (#130900)Matt Arsenault
2025-02-18PeepholeOpt: Handle subregister compose when looking through reg_sequence (#1...Matt Arsenault
2024-11-08[FIX][AMDGPU] Fix test case failures that caused by reapply of #112403Shilei Tian
2024-11-08Reapply "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#...Shilei Tian
2024-11-08Revert "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#1...Shilei Tian
2024-11-08[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)Shilei Tian
2024-10-21[AMDGPU] Skip VGPR deallocation for waveslot limited kernels (#112765)Stanislav Mekhanoshin
2024-07-15Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and fol...Matt Arsenault
2024-07-14Revert "AMDGPU: Move attributor into optimization pipeline (#83131)" and foll...dyung
2024-07-14AMDGPU: Move attributor into optimization pipeline (#83131)Matt Arsenault
2024-02-13[AMDGPU][GlobalIsel] Introduce isRegisterClassType to check for legal types, ...sstipanovic
2023-12-14[AMDGPU] Enable GCNRewritePartialRegUses pass by default. (#72975)Valery Pykhtin
2023-12-06[GISel] Combine (Scalarize) vector load followed by an element extract.Pranav Taneja
2023-10-30[AMDGPU] Select 64-bit imm moves if can be encoded as 32 bit operand (#70395)Stanislav Mekhanoshin
2023-07-19[AMDGPU] Insert s_nop before s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)Jay Foad
2023-07-04[AMDGPU] Do not wait for vscnt on function entry and returnJay Foad
2023-06-07[AMDGPU] Turn off pass to rewrite partially used virtual superregisters after...Valery Pykhtin
2023-05-26[AMDGPU] Add pass to rewrite partially used virtual superregisters after Rena...Valery Pykhtin
2023-05-03[AMDGPU][GlobalISel] Check exact width in get*ClassForBitWidth and widen if n...Mateja Marjanovic
2023-05-03Revert "[AMDGPU][GlobalISel] Widen the vector operand in G_BUILD/INSERT/EXTRA...Mateja Marjanovic
2023-05-03[AMDGPU][GlobalISel] Widen the vector operand in G_BUILD/INSERT/EXTRACT_VECTORMateja Marjanovic
2023-03-17[AMDGPU] Reserve extra SGPR blocks wth XNACK "any" TID SettingAustin Kerbow
2023-02-10[AMDGPU] Run unmerge combines post regbankselectPierre van Houtryve
2023-01-23AMDGPU: Clean up LDS-related occupancy calculationsNicolai Hähnle
2022-11-28AMDGPU: Bulk update all GlobalISel tests to use opaque pointersMatt Arsenault
2022-07-08[AMDGPU] Add GFX11 test coverageJay Foad
2022-06-02[AMDGPU] Improve codegen of extractelement/insertelement in some casesJulien Pages
2021-12-04AMDGPU: Optimize out implicit kernarg argument allocation if unusedMatt Arsenault
2021-12-01[AMDGPU] Set most sched model resource's BufferSize to oneAustin Kerbow
2021-09-14[AMDGPU] Switch PostRA sched to MachineSchedJoe Nash
2021-08-17[GlobalISel] Add combine for PTR_ADD with regbanksSebastian Neubauer
2021-06-30[AMDGPU] Add S_MOV_B64_IMM_PSEUDO for wide constantsStanislav Mekhanoshin
2021-04-26[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impactsBaptiste Saleil
2021-04-01[AMDGPU][MC][GFX10][GFX90A] Corrected _e32/_e64 sufficesDmitry Preobrazhensky
2021-03-29[AMDGPU] Extend gfx10 test coverage. NFC.Petar Avramovic
2021-01-26[AMDGPU] Update subtarget features for new target ID supportAustin Kerbow
2020-12-23[AMDGPU][GlobalISel] Fold flat vgpr + constant addressesSebastian Neubauer
2020-11-16AMDGPU: Select global saddr mode from SGPR pointerMatt Arsenault
2020-10-20[AMDGPU] Optimize waitcnt insertion for flat memory operationsTony
2020-09-23Revert "[AMDGPU] Insert waitcnt after returning from call"Sebastian Neubauer
2020-09-23[AMDGPU] Insert waitcnt after returning from callSebastian Neubauer
2020-08-06GlobalISel: Implement fewerElementsVector for G_EXTRACT_VECTOR_ELTMatt Arsenault