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AgeCommit message (Expand)Author
2025-07-02[HashRecognize] Rewrite arePHIsIntertwined (#144878)Ramkumar Ramachandra
2025-07-02[AArch64][TTI] Reduce cost for splatting whole first vector segment (SVE) (#1...Graham Hunter
2025-07-01[AArch64] Mark neon.stN intrinsics as writeonly (#145289)Nikita Popov
2025-06-30[IR2Vec] Scale embeddings once in vocab analysis instead of repetitive scalin...S. VenkataKeerthy
2025-06-30[LAA] Clean up APInt-overflow related code (#140048)Ramkumar Ramachandra
2025-06-29AMDGPU: Implement intrinsic/builtins for gfx1250 load transpose instructions ...Changpeng Fang
2025-06-29[LAA] Add tests with 128 bit inductions and 128 bit pointers.Florian Hahn
2025-06-28[CostModel/RISCV] Add tests for ldexp, [l]lround (#146108)Ramkumar Ramachandra
2025-06-27[TTI] getInstructionCost - consistently treat all undef/poison shuffle masks ...Simon Pilgrim
2025-06-26[AMDGPU] Enable vectorization of i8 values. (#134934)Gheorghe-Teodor Bercea
2025-06-26[CostModel] getInstructionCost - match SK_InsertSubvector shuffle patterns be...Simon Pilgrim
2025-06-25[AArch64][CostModel] Lower cost of dupq (SVE2.1) (#144918)Graham Hunter
2025-06-23[LAA] Be more careful when evaluating AddRecs at symbolic max BTC. (#128061)Florian Hahn
2025-06-23[CostModel] improveShuffleKindFromMask - recognise a SK_PermuteSingleSrc inco...Simon Pilgrim
2025-06-23[LAA] Update early-exit test to cover last valid & first invalid access.Florian Hahn
2025-06-23[ARM] Add MVE test coverage for LD2/ST2 shuffle costs. NFCDavid Green
2025-06-19[LLVM][IRBuilder] Use NUW arithmetic for Create{ElementCount,TypeSize}. (#143...Paul Walker
2025-06-18[HashRecognize] Tighten pre-conditions for analysis (#144757)Ramkumar Ramachandra
2025-06-18[HashRecognize] Fix big-endian CRC tables (#144754)Ramkumar Ramachandra
2025-06-18AMDGPU: Report special input intrinsics as free (#141948)Matt Arsenault
2025-06-18AMDGPU: Add baseline cost model tests for special argument intrinsics (#141947)Matt Arsenault
2025-06-18AMDGPU: Cost model for minimumnum/maximumnum (#141946)Matt Arsenault
2025-06-18AMDGPU: Reduce cost of f64 copysign (#141944)Matt Arsenault
2025-06-18AMDGPU: Fix cost model for 16-bit operations on gfx8 (#141943)Matt Arsenault
2025-06-18AMDGPU: Add cost model tests for minimumnum/maximumnum (#141904)Matt Arsenault
2025-06-17[AArch64] Report icmp as free if it can be folded into ands (#143286)AZero13
2025-06-16[RISCV][TTI] Refine reverse shuffle costing for high LMUL (#144155)Philip Reames
2025-06-16[TargetLowering][RISCV] Allow scalable non-simple EVTs to be split even if th...Craig Topper
2025-06-16[ValueTracking] Remove opcode whitelist from matchSimpleRecurrence. (#144031)Ricardo Jesus
2025-06-13[NFC][AMDGPU] Fix stale links to ROCm repositories (#143949)Saiyedul Islam
2025-06-12[RISCV][CostModel] Add additional high LMUL reverse testsPhilip Reames
2025-06-12[AA] Take read-only provenance captures into account (#143097)Nikita Popov
2025-06-12[MemCpyOpt] Fix lifetime marker sizes in tests (NFC)Nikita Popov
2025-06-12[BasicAA][ValueTracking] Increase depth for underlying object search (#143714)Nikita Popov
2025-06-11[AArch64] Consider negated powers of 2 when calculating throughput cost (#143...AZero13
2025-06-06[AA] Add additional tests for mixed of different captures (NFC)Nikita Popov
2025-06-04[LAA] Keep pointer checks on partial analysis (#139719)John Brawn
2025-06-02[HashRecognize] Introduce new analysis (#139120)Ramkumar Ramachandra
2025-06-01[SCEV] Add additional test coverage for loop-guards reasoning.Florian Hahn
2025-05-30[RISCV][TTI] Discount slide cost if ri.vinsert/ri.vextract are available (#14...Philip Reames
2025-05-29[DirectX] Update resource type names in DXIL metadata to include element type...Helena Kotas
2025-05-29[Uniformity] Fixed control-div early stop (#139667)Junjie Gu
2025-05-28[TTI] Provide a cost for memset_pattern which matches the libcall (#139978)Philip Reames
2025-05-28[DirectX] Gather resource names in DXIL resource analysis (#140633)Helena Kotas
2025-05-27[DirectX] Add resource name argument to llvm.dx.handlefrom[implicit]binding i...Helena Kotas
2025-05-27[AArch64] Allow lowering of more types to GET_ACTIVE_LANE_MASK (#140062)Kerry McLaughlin
2025-05-22Reland "[NVPTX] Unify and extend barrier{.cta} intrinsic support" (#141143)Alex MacLean
2025-05-22Revert "[NVPTX] Unify and extend barrier{.cta} intrinsic support (#140615)"Alex Maclean
2025-05-22Adding IR2Vec as an analysis pass (#134004)S. VenkataKeerthy
2025-05-22Fix regression tests with bad FileCheck checks (#140373)Mohammad Bashir
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