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path: root/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
AgeCommit message (Expand)Author
2025-09-23[CodeGen] Rename isReallyTriviallyReMaterializable [nfc]Philip Reames
2025-09-19PPC: Replace PointerLikeRegClass with RegClassByHwMode (#158777)Matt Arsenault
2025-09-08CodeGen: Pass SubtargetInfo to TargetGenInstrInfo constructors (#157337)Matt Arsenault
2025-09-06PPC: Fix missing const on TargetInstrInfo's subtarget reference (#157201)Matt Arsenault
2025-08-27[PowerPC] Add DMR and WACC COPY support (#149129)Maryam Moghadas
2025-06-18[PowerPC] Add code to spill and restore DMRp registers (#142443)Lei Huang
2025-06-02[PowerPC] Spill and restore DMR register (#141530)Lei Huang
2025-05-26[PowerPC] Update DMF VSX ACC data transfer instructions (#138897)Lei Huang
2025-04-18[Analysis] Remove implicit LocationSize conversion from uint64_t (#133342)Philip Reames
2025-04-03[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)zhijian lin
2025-03-13[MachineCombiner][Targets] Use Register in TII genAlternativeCodeSequence int...Craig Topper
2025-02-27[PowerPC] Avoid repeated hash lookups (NFC) (#129193)Kazu Hirata
2025-02-24[CodeGen] Change copyPhysReg interface to use Register instead of MCRegister....Craig Topper
2025-02-20Revert "[CodeGen] Remove static member function Register::isVirtualRegister. ...Christopher Di Bella
2025-02-20[CodeGen] Remove static member function Register::isVirtualRegister. NFC (#12...Craig Topper
2025-02-19Revert "[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (...David Tenty
2025-02-13[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#116984)zhijian lin
2025-01-23[llvm][CodeGen] Fix the issue caused by live interval checking in window sche...Hua Tian
2025-01-22[llvm] Pass MachineInstr flags to storeRegToStackSlot/loadRegFromStackSlot (N...Venkata Ramanaiah Nalamothu
2025-01-03[PowerPC] Use `RegisterClassInfo::getRegPressureSetLimit` (#120383)Pengcheng Wang
2024-11-14[PowerPC] Remove unused includes (NFC) (#116163)Kazu Hirata
2024-11-12[llvm] Remove redundant control flow statements (NFC) (#115831)Kazu Hirata
2024-10-31Promote 32bit pseudo instr that infer extsw removal to 64bit in PPCMIPeephole...zhijian lin
2024-10-17[PowerPC][ISelLowering] Support -mstack-protector-guard=tls (#110928)Keith Packard
2024-08-27[TII][RISCV] Add renamable bit to copyPhysReg (#91179)Piyou Chen
2024-07-23[PowerPC] Add support for -mcpu=pwr11 / -mtune=pwr11 (#99511)azhan92
2024-07-13[Target] Use range-based for loops (NFC) (#98705)Kazu Hirata
2024-07-03[PowerPC] refactor CPU info in PPCTargetParser.def, NFCChen Zheng
2024-06-28[IR] Add getDataLayout() helpers to Function and GlobalValue (#96919)Nikita Popov
2024-05-21[PowerPC][AIX] 64-bit large code-model support for toc-data (#90619)Zaara Syeda
2024-04-24[CodeGen] Make the parameter TRI required in some functions. (#85968)Xu Zhang
2024-04-17[PowerPC] 32-bit large code-model support for toc-data (#85129)Zaara Syeda
2024-04-11[MachineCombiner][NFC] Split target-dependent patternsPengcheng Wang
2024-03-13[PowerPC][NFC] Rename ADDItocL to match the 64-bit naming convention (#85099)Zaara Syeda
2024-03-06[Codegen] Make Width in getMemOperandsWithOffsetWidth a LocationSize. (#83875)David Green
2024-03-01[PowerPC] Support local-dynamic TLS relocation on AIX (#66316)Felix (Ting Wang)
2024-02-01[TTI] Use Register in isLoadFromStackSlot and isStoreToStackSlot [nfc] (#80339)Philip Reames
2024-01-26[PowerPC][X86] Make cpu id builtins target independent and lower for PPC (#68...Nemanja Ivanovic
2024-01-26[NFC] Rename TargetInstrInfo::FoldImmediate to TargetInstrInfo::foldImmediate...Shengchen Kan
2024-01-18[NFC][PowerPC] remove the redundant spill related flags settingChen Zheng
2024-01-15[PowerPC] Implement fence builtin (#76495)Qiu Chaofan
2023-12-20[PowerPC] Use 'sync; ld; cmp; bc; isync' for atomic load seq-cst on 32-bit ...Kai Luo
2023-12-18[PowerPC] Let base implementation decide if MI is rematerizable by default (#...Kai Luo
2023-12-07[PowerPC] redesign the target flags (#69695)Chen Zheng
2023-12-06[MachineScheduler][NFCI] Add Offset and OffsetIsScalable args to shouldCluste...Alex Bradbury
2023-12-01TargetInstrInfo: make getOperandLatency return optional (NFC) (#73769)Ramkumar Ramachandra
2023-11-29[NFC][MachineScheduler] Rename NumLoads parameter of shouldClusterMemOps to C...Alex Bradbury
2023-11-22[AArch64] Use the same fast math preservation for MachineCombiner reassociati...Craig Topper
2023-11-20[PowerPC][EarlyIfConversion] Do not insert `isel` if subtarget doesn't suppor...Kai Luo
2023-11-11[llvm] Stop including llvm/ADT/DenseSet.h (NFC)Kazu Hirata
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