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path: root/llvm/lib/Target/Hexagon/RDFGraph.cpp
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2020-03-17Move RDF from Hexagon to CodegenScott Constable
RDF is designed to be target agnostic. Therefore it would be useful to have it available for other targets, such as X86. Based on a previous patch by Krzysztof Parzyszek Differential Revision: https://reviews.llvm.org/D75932
2019-08-15Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders
Summary: This clang-tidy check is looking for unsigned integer variables whose initializer starts with an implicit cast from llvm::Register and changes the type of the variable to llvm::Register (dropping the llvm:: where possible). Partial reverts in: X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister X86FixupLEAs.cpp - Some functions return unsigned and arguably should be MCRegister X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister HexagonBitSimplify.cpp - Function takes BitTracker::RegisterRef which appears to be unsigned& MachineVerifier.cpp - Ambiguous operator==() given MCRegister and const Register PPCFastISel.cpp - No Register::operator-=() PeepholeOptimizer.cpp - TargetInstrInfo::optimizeLoadInstr() takes an unsigned& MachineTraceMetrics.cpp - MachineTraceMetrics lacks a suitable constructor Manual fixups in: ARMFastISel.cpp - ARMEmitLoad() now takes a Register& instead of unsigned& HexagonSplitDouble.cpp - Ternary operator was ambiguous between unsigned/Register HexagonConstExtenders.cpp - Has a local class named Register, used llvm::Register instead of Register. PPCFastISel.cpp - PPCEmitLoad() now takes a Register& instead of unsigned& Depends on D65919 Reviewers: arsenm, bogner, craig.topper, RKSimon Reviewed By: arsenm Subscribers: RKSimon, craig.topper, lenary, aemerson, wuzish, jholewinski, MatzeB, qcolombet, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, wdng, nhaehnle, sbc100, jgravelle-google, kristof.beyls, hiraditya, aheejin, kbarton, fedor.sergeev, javed.absar, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, tpr, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, Jim, s.egerton, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65962 llvm-svn: 369041
2019-08-01Finish moving TargetRegisterInfo::isVirtualRegister() and friends to ↵Daniel Sanders
llvm::Register as started by r367614. NFC llvm-svn: 367633
2019-03-11Hexagon RDF: Replace function template (plus explicit specializations) with ↵David Blaikie
non-template overloads For the design in question, overloads seem to be a much simpler and less subtle solution. This removes ODR issues, and errors of the kind where code that uses the specialization in question will accidentally and erroneously specialize the primary template. This only "works" by accident; the program is ill-formed NDR. (Found with -Wundefined-func-template.) Patch by Thomas Köppe! Differential Revision: https://reviews.llvm.org/D58998 llvm-svn: 355880
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth
to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
2018-09-27llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)Fangrui Song
Summary: The convenience wrapper in STLExtras is available since rL342102. Reviewers: dblaikie, javed.absar, JDevlieghere, andreadb Subscribers: MatzeB, sanjoy, arsenm, dschuff, mehdi_amini, sdardis, nemanjai, jvesely, nhaehnle, sbc100, jgravelle-google, eraman, aheejin, kbarton, JDevlieghere, javed.absar, gbedwell, jrtc27, mgrang, atanasyan, steven_wu, george.burgess.iv, dexonsmith, kristina, jsji, llvm-commits Differential Revision: https://reviews.llvm.org/D52573 llvm-svn: 343163
2018-05-09[DebugInfo] Examine all uses of isDebugValue() for debug instructions.Shiva Chen
Because we create a new kind of debug instruction, DBG_LABEL, we need to check all passes which use isDebugValue() to check MachineInstr is debug instruction or not. When expelling debug instructions, we should expel both DBG_VALUE and DBG_LABEL. So, I create a new function, isDebugInstr(), in MachineInstr to check whether the MachineInstr is debug instruction or not. This patch has no new test case. I have run regression test and there is no difference in regression test. Differential Revision: https://reviews.llvm.org/D45342 Patch by Hsiangkai Wang. llvm-svn: 331844
2018-03-24[Hexagon] Change std::sort to llvm::sort in response to r327219Mandeep Singh Grang
Summary: r327219 added wrappers to std::sort which randomly shuffle the container before sorting. This will help in uncovering non-determinism caused due to undefined sorting order of objects having the same key. To make use of that infrastructure we need to invoke llvm::sort instead of std::sort. Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort. Refer the comments section in D44363 for a list of all the required patches. Reviewers: kparzysz Reviewed By: kparzysz Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D44857 llvm-svn: 328430
2017-12-15MachineFunction: Return reference from getFunction(); NFCMatthias Braun
The Function can never be nullptr so we can return a reference. llvm-svn: 320884
2017-12-04[CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih
As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-11-17Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie
All these headers already depend on CodeGen headers so moving them into CodeGen fixes the layering (since CodeGen depends on Target, not the other way around). llvm-svn: 318490
2017-11-08Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie
This header includes CodeGen headers, and is not, itself, included by any Target headers, so move it into CodeGen to match the layering of its implementation. llvm-svn: 317647
2017-10-16Add iterator range MachineRegisterInfo::liveins(), adopt users, NFCKrzysztof Parzyszek
llvm-svn: 315927
2017-10-05[RDF] Simplify construction of maximal registersKrzysztof Parzyszek
The old algoritm was not correct, although it worked most of the time. Avoid the complex reachability analysis and simply calculate the maximal registers out of the set of all referenced registers. llvm-svn: 314991
2017-08-01[Hexagon] Fix some Clang-tidy modernize-use-using and Include What You Use ↵Eugene Zelenko
warnings; other minor fixes (NFC). llvm-svn: 309746
2017-06-06Sort the remaining #include lines in include/... and lib/....Chandler Carruth
I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). llvm-svn: 304787
2017-04-14[RDF] No longer ignore implicit defs or uses on any instructionsKrzysztof Parzyszek
This used to be a Hexagon-specific treatment, but is no longer needed since it's switched to subregister liveness tracking. llvm-svn: 300369
2017-04-14[RDF] Switch RegisterAggr to a bit vector of register unitsKrzysztof Parzyszek
This avoids many complications related to the complex register aliasing schemes. llvm-svn: 300345
2017-02-22[RDF] Only access block live-ins when tracking livenessKrzysztof Parzyszek
llvm-svn: 295855
2017-02-16Fix -Wunused-lambda-capture by removing some unused lambda capturesDavid Blaikie
llvm-svn: 295373
2017-02-16[RDF] Differentiate between defining and clobbering nodesKrzysztof Parzyszek
Defining nodes should not alias with one another, while clobbering nodes can. When pushing defs on stacks, push clobbers first, link non-clobbering defs, then push the defs. The data flow in a statement is now: uses -> clobbers -> defs. llvm-svn: 295356
2017-02-16[RDF] Move normalize(RegisterRef) to PhysicalRegisterInfoKrzysztof Parzyszek
Remove the duplicate from DFG and make some members of PRI private. llvm-svn: 295351
2017-01-30[RDF] Add support for regmasksKrzysztof Parzyszek
llvm-svn: 293538
2017-01-30[RDF] Extract the physical register information into a separate classKrzysztof Parzyszek
llvm-svn: 293510
2017-01-30[RDF] Add phis for entry block live-ins (in addition to function live-ins)Krzysztof Parzyszek
llvm-svn: 293491
2017-01-13Remove unused lambda captures. NFCMalcolm Parsons
llvm-svn: 291916
2017-01-04[Hexagon, TableGen] Fix some Clang-tidy modernize and Include What You Use ↵Eugene Zelenko
warnings; other minor fixes (NFC). llvm-svn: 290925
2016-12-16Implement LaneBitmask::any(), use it to replace !none(), NFCIKrzysztof Parzyszek
llvm-svn: 289974
2016-12-15Extract LaneBitmask into a separate typeKrzysztof Parzyszek
Specifically avoid implicit conversions from/to integral types to avoid potential errors when changing the underlying type. For example, a typical initialization of a "full" mask was "LaneMask = ~0u", which would result in a value of 0x00000000FFFFFFFF if the type was extended to uint64_t. Differential Revision: https://reviews.llvm.org/D27454 llvm-svn: 289820
2016-12-08[RDF] Fix incorrect lane mask calculationKrzysztof Parzyszek
This was exposed by some code that used more than one level of sub- registers. There is no testcase, because there is no such code in the Hexagon backend. llvm-svn: 289099
2016-11-18Timer: Track name and description.Matthias Braun
The previously used "names" are rather descriptions (they use multiple words and contain spaces), use short programming language identifier like strings for the "names" which should be used when exporting to machine parseable formats. Also removed a unused TimerGroup from Hexxagon. Differential Revision: https://reviews.llvm.org/D25583 llvm-svn: 287369
2016-10-21[RDF] Use RegisterId typedef more consistently, NFCKrzysztof Parzyszek
llvm-svn: 284857
2016-10-19[RDF] Switch RefMap in liveness calculation to use lane masksKrzysztof Parzyszek
This required reengineering of some of the part of liveness calculation, including fixing some issues caused by the limitations of the previous approach. The current code is not necessarily the fastest, but it should be functionally correct (at least more so than before). The compile-time performance will be addressed in the future. llvm-svn: 284609
2016-10-14The real fix for post-r284255 failuresKrzysztof Parzyszek
llvm-svn: 284264
2016-10-14[RDF] Switch RegisterRef to be a pair (Register, LaneMask)Krzysztof Parzyszek
Use PackedRegisterRef to store the register information in the graph nodes. This commit also removes support for virtual registers. It has never been tested or used. It will be possible to add it back if there is a need. llvm-svn: 284255
2016-10-06[RDF] Replace potentially unclear autos with real typesKrzysztof Parzyszek
llvm-svn: 283445
2016-10-03[RDF] Further improve readability of the graphKrzysztof Parzyszek
Print target basic block for a branch. llvm-svn: 283126
2016-10-03[RDF] Replace RegisterAliasInfo with target-independent code using lane masksKrzysztof Parzyszek
llvm-svn: 283122
2016-09-27[RDF] Add "dead" flag to node attributesKrzysztof Parzyszek
llvm-svn: 282520
2016-09-27[RDF] Special treatment of exception handling registersKrzysztof Parzyszek
A landing pad can have live-in registers that are defined by the runtime, not the program (exception pointer register and exception selector register). Make sure to recognize that case and not link these registers with any defs in the program. Each landing pad will have phi nodes added at the beginning to provide definitions of these registers, but the uses of those phi nodes will not have any reaching defs. llvm-svn: 282519
2016-09-22[RDF] Add initial support for lane masks in the DFGKrzysztof Parzyszek
Use lane masks for calculating covering and aliasing of register references. llvm-svn: 282194
2016-09-22[RDF] Print the function name for calls in dumpsKrzysztof Parzyszek
llvm-svn: 282191
2016-09-22[RDF] Use uint32_t for register numbers instead of unsignedKrzysztof Parzyszek
llvm-svn: 282190
2016-09-07[RDF] Introduce "undef" flag for ref nodesKrzysztof Parzyszek
llvm-svn: 280851
2016-09-06[RDF] Ignore undef use operandsKrzysztof Parzyszek
llvm-svn: 280717
2016-08-11Use range algorithms instead of unpacking begin/endDavid Majnemer
No functionality change is intended. llvm-svn: 278417
2016-07-22[RDF] Make the graph construction/use less expensiveKrzysztof Parzyszek
- FuncNode::findBlock traverses the function every time. Avoid using it, and keep a cache of block addresses in DataFlowGraph instead. - The operator[] in the map of definition stacks was very slow. Replace the map with unordered_map. llvm-svn: 276429
2016-05-27[hexagon] Move BlockRanges and RDF stuff into the llvm namespace.Benjamin Kramer
No functional change intended. llvm-svn: 270980
2016-05-05[scan-build] fix warnings emitted on LLVM Hexagon code baseKrzysztof Parzyszek
Patch by Apelete Seketeli. Differential Revision: http://reviews.llvm.org/D19968 llvm-svn: 268691
2016-04-28[RDF] Recognize tail calls in graph creationKrzysztof Parzyszek
llvm-svn: 267939
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