| Age | Commit message (Expand) | Author |
|---|
| 2013-10-22 | ARM: provide diagnostics on more writeback LDM/STM instructions | Tim Northover |
| 2013-10-01 | [ARM] Remove an unused function from the disassembler. | Joey Gouly |
| 2013-09-19 | [ARMv8] Add support for the v8 cryptography extensions. | Amara Emerson |
| 2013-08-06 | This corrects creation of operands for t2PLDW. It also removes the definition... | Mihai Popa |
| 2013-07-17 | [ARMv8] Add support for the NEON instructions vmaxnm/vminnm. | Joey Gouly |
| 2013-07-04 | Remove an unneeded call to 'UpdateThumbVFPPredicate', spotted by Amaury. | Joey Gouly |
| 2013-07-04 | Add support for MC assembling and disassembling of vsel{ge, gt, eq, vs} instr... | Joey Gouly |
| 2013-06-24 | ARM: check predicate bits for thumb instructions | Amaury de la Vieuville |
| 2013-06-24 | ARM: rGPR is meant to be unpredictable, not undefined | Amaury de la Vieuville |
| 2013-06-24 | ARM: fix IT decoding | Amaury de la Vieuville |
| 2013-06-24 | ARM: enable decoding of pc-relative PLD/PLI | Amaury de la Vieuville |
| 2013-06-18 | ARM: fix thumb literal loads decoding | Amaury de la Vieuville |
| 2013-06-18 | ARM: thumb stores cannot use PC as dest register | Amaury de la Vieuville |
| 2013-06-13 | ARM: fix B decoding | Amaury de la Vieuville |
| 2013-06-11 | ARM: Enforce decoding rules for VLDn instructions | Amaury de la Vieuville |
| 2013-06-11 | ARM: Fix STREX/LDREX reecoding | Amaury de la Vieuville |
| 2013-06-10 | ARM: ISB cannot be passed the same options as DMB | Amaury de la Vieuville |
| 2013-06-08 | ARM: fix VMOVvnf32 decoding when ambiguous with VCVT | Amaury de la Vieuville |
| 2013-06-08 | ARM: enforce SRS decoding constraints | Amaury de la Vieuville |
| 2013-06-08 | ARM: fix CPS decoding when ambiguous with QADD | Amaury de la Vieuville |
| 2013-06-08 | ARM: fix VCVT decoding | Amaury de la Vieuville |
| 2013-05-31 | ARM: add fstmx and fldmx instructions for assembly | Tim Northover |
| 2013-05-24 | Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros. | Michael J. Spencer |
| 2013-05-24 | Remove the Copied parameter from MemoryObject::readBytes. | Benjamin Kramer |
| 2013-05-24 | Add MCSymbolizer for symbolic/annotated disassembly. | Ahmed Bougacha |
| 2013-05-20 | VSTn instructions have a number of encoding constraints which are not impleme... | Mihai Popa |
| 2013-05-20 | Q registers are encoded in fields of the same length as D registers. As Q reg... | Mihai Popa |
| 2013-05-19 | Replace some bit operations with simpler ones. No functionality change. | Benjamin Kramer |
| 2013-05-13 | The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instruction... | Mihai Popa |
| 2013-04-26 | ARM: Fix encoding of hint instruction for Thumb. | Quentin Colombet |
| 2013-04-19 | ARM: Permit "sp" in ARM variant of STREXD instructions | Tim Northover |
| 2013-04-19 | ARM: permit "sp" in ARM variants of MOVW/MOVT instructions | Tim Northover |
| 2013-04-17 | Fix treatment of ARM unallocated hint instructions. | Quentin Colombet |
| 2013-03-28 | Fix issue with disassembler decoding CBZ/CBNZ immediates as negatives when th... | Gordon Keiser |
| 2013-03-26 | Patch by Gordon Keiser! | Joe Abbey |
| 2012-12-19 | Remove edis - the enhanced disassembler. Fixes PR14654. | Roman Divacky |
| 2012-12-03 | Use the new script to sort the includes of every file under lib. | Chandler Carruth |
| 2012-11-29 | Fixed the arm disassembly of invalid BFI instructions to not build a bad MCInst | Kevin Enderby |
| 2012-10-29 | Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch target | Kevin Enderby |
| 2012-10-18 | Fix a bug where a 32-bit address with the high bit does not get symbolicated | Kevin Enderby |
| 2012-09-22 | Fix the handling of edge cases in ARM shifted operands. | Tim Northover |
| 2012-09-06 | Diagnose invalid alignments on duplicating VLDn instructions. | Tim Northover |
| 2012-09-06 | Check for invalid alignment values when decoding VLDn/VSTn (single ln) instru... | Tim Northover |
| 2012-08-24 | Fix integer undefined behavior due to signed left shift overflow in LLVM. | Richard Smith |
| 2012-08-17 | Remove unnecessary include of ARMGenInstrInfo.inc. | Craig Topper |
| 2012-08-14 | Switch the fixed-length disassembler to be table-driven. | Jim Grosbach |
| 2012-08-02 | Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ... | Jiangning Liu |
| 2012-08-02 | Fix #13138, a bug around ARM instruction DSB encoding and decoding issue. | Jiangning Liu |
| 2012-07-23 | Fix a typo (the the => the) | Sylvestre Ledru |
| 2012-07-10 | Fix instruction description of VMOV (between two ARM core registers and two s... | Richard Barton |
