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path: root/llvm/lib/Target/AMDGPU/Utils
AgeCommit message (Expand)Author
2025-07-01[AMDGPU] Remove an unnecessary cast (NFC) (#146548)Kazu Hirata
2025-06-25[AMDGPU][GFX1250] Insert S_WAIT_XCNT for SMEM and VMEM load-stores (#145566)Christudasan Devadasan
2025-06-24[AMDGPU] Replace dynamic VGPR feature with attribute (#133444)Diana Picus
2025-06-21[AMDGPU] Rename call instructions from b64 to i64 (#145103)Stanislav Mekhanoshin
2025-06-05[AMDGPU] Remove duplicated/confusing helpers. NFCI (#142598)Diana Picus
2025-05-25Replace #include MCAsmLexer.h with AsmLexer.hFangrui Song
2025-05-14[AMDGPU] Use std::optional::value_or (NFC) (#140006)Kazu Hirata
2025-05-13Reapply "[AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during sched...Lucas Ramirez
2025-05-09Revert "[AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during schedu...Vitaly Buka
2025-05-09[AMDGPU][NFC] Remove _DEFERRED operands. (#139123)Ivan Kosarev
2025-05-08[AMDGPU][NFC] Remove unused operand types. (#139062)Ivan Kosarev
2025-05-08[AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during scheduling (#1...Lucas Ramirez
2025-04-28[AMDGPU] Update pal metadata for v3.6 and fix v3.0 (#135196)David Stuttard
2025-04-27[AMDGPU] Simplify GetMember...::Get (NFC) (#137536)Kazu Hirata
2025-04-27[AMDGPU] Simplify PrintField::printField (NFC) (#137502)Kazu Hirata
2025-04-13[AMDGPU][True16][MC] fix fmac_f16_t16 vop3 format (#135464)Brox Chen
2025-04-10[AMDGPU] Add support for point sample accel out of order returns (#127991)David Stuttard
2025-03-29[NFC][AMDGPU] clang-format `AMDGPUBaseInfo.[h,cpp]` (#133559)Shilei Tian
2025-03-27[AMDGPU] Add a new function `getIntegerPairAttribute` (#133271)Shilei Tian
2025-03-21Reapply "[AMDGPU] Use COV6 by default (#118515)" (#130963)Shilei Tian
2025-03-19[AMDGPU] Update target helpers & GCNSchedStrategy for dynamic VGPRs (#130047)Diana Picus
2025-03-17[llvm][AMDGPU] Enable FWD_PROGRESS bit for GFX10+ (#128367)Alex Voicu
2025-03-15[AMDGPU] Avoid repeated hash lookups (NFC) (#131493)Kazu Hirata
2025-03-15[MC] evaluateAsRelocatableImpl: remove the Fixup argumentFangrui Song
2025-03-14[NFC][AMDGPU] Replace more direct arch comparison with isAMDGCN() (#131379)Shilei Tian
2025-03-12[AMDGPU] Merge consecutive wait_alu instruction (#128916)Ana Mihajlovic
2025-03-04AMDGPU: Remove repeated define in base info headerMatt Arsenault
2025-03-03[AMDGPU] Simplify conditional expressions. NFC. (#129228)Jay Foad
2025-02-25[AMDGPU][True16][CodeGen] uaddsat/usubsat true16 selection in gisel (#128233)Brox Chen
2025-02-19[AMDGPU] Replace gfx940 and gfx941 with gfx942 in llvm (#126763)Fabian Ritter
2025-02-18[AMDGPU][True16][CodeGen] reopen "FLAT_load using D16 pseudo instruction" (#1...Brox Chen
2025-02-18Revert "[AMDGPU][True16][CodeGen] FLAT_load using D16 pseudo instruction (#11...Nikita Popov
2025-02-18[AMDGPU][True16][CodeGen] FLAT_load using D16 pseudo instruction (#114500)Brox Chen
2025-02-12[TableGen] Emit OpName as an enum class instead of a namespace (#125313)Rahul Joshi
2025-02-04[AMDGPU] Simplify Waitcnt constructor. NFC. (#125672)Jay Foad
2025-02-04[AMDGPU] Add .entry_point back into PAL metadata (#125505)David Stuttard
2025-01-30[AMDGPU] Rewrite GFX12 SGPR hazard handling to dedicated pass (#118750)Carl Ritson
2025-01-22[AMDGPU] Fix unreachable reg bit width (#122107)Shoreshen
2025-01-21[AMDGPU] Update entry point name for PAL metadata (#123581)David Stuttard
2024-12-11[AMDGPU][Attributor] Make `AAAMDFlatWorkGroupSize` honor existing attribute (...Shilei Tian
2024-12-11[AMDGPU] Handle hazard in v_scalef32_sr_fp4_* conversions (#118589)Pravin Jagtap
2024-12-05[AMDGPU][NFC] Delete duplicate decl and impl defines. (#118843)Pravin Jagtap
2024-12-03Revert "[AMDGPU] Use COV6 by default (#118515)"Shilei Tian
2024-12-03[AMDGPU] Use COV6 by default (#118515)Shilei Tian
2024-12-02AMDGPU: Handle cvt_scale F32/F16->F4/F8 gfx950 hazard (#117844)Matt Arsenault
2024-11-26AMDGPU: Verify f8f6f4 formats in assembler (#117826)Matt Arsenault
2024-11-25AMDGPU: Add support for v_dot2c_f32_bf16 instruction for gfx950 (#117598)Matt Arsenault
2024-11-21AMDGPU: Define v_mfma_f32_{16x16x128|32x32x64}_f8f6f4 instructions (#116723)Matt Arsenault
2024-11-18AMDGPU: Increase the LDS size to support to 160 KB for gfx950 (#116309)Matt Arsenault
2024-11-14[AMDGPU][True16][MC] Implement V_CVT_PK_F32_FP8/BF8 (#116106)Joe Nash