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path: root/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
AgeCommit message (Expand)Author
2025-07-01AMDGPU: Implement ds_atomic_async_barrier_arrive_b64/ds_atomic_barrier_arrive...Changpeng Fang
2025-06-24[AMDGPU] Replace dynamic VGPR feature with attribute (#133444)Diana Picus
2025-06-13Revert "[AMDGPU] Skip register uses in AMDGPUResourceUsageAnalysis (#… (#14...Diana Picus
2025-06-04[AMDGPU] Use MachineRegisterInfo::def_instructions (NFC) (#142782)Kazu Hirata
2025-06-03[AMDGPU] Skip register uses in AMDGPUResourceUsageAnalysis (#133242)Diana Picus
2025-05-05[AMDGPU] Remove implicit definition of register group when restoring the last...Ryan Buchner
2025-04-25Reland [AMDGPU] Support block load/store for CSR #130013 (#137169)Diana Picus
2025-04-23Revert "[AMDGPU] Support block load/store for CSR" (#136846)Diana Picus
2025-04-23[AMDGPU] Support block load/store for CSR (#130013)Diana Picus
2025-03-19[AMDGPU] Allocate scratch space for dVGPRs for CWSR (#130055)Diana Picus
2025-03-17[AMDGPU] frame index elimination hit assertion for scavenged nonreg (#130287)Pankaj Dwivedi
2025-03-12[AMDGPU][True16] added Pre-RA hint to improve copy elimination (#103366)Brox Chen
2025-03-06AMDGPU: Replace amdgpu-no-agpr with amdgpu-agpr-alloc (#129893)Matt Arsenault
2025-03-06AMDGPU: Add amdgpu-agpr-alloc attribute to control AGPR allocation (#128034)Matt Arsenault
2025-03-05AMDGPU: Handle s_add_u32 in eliminateFrameIndex (#129628)Matt Arsenault
2025-03-03[AMDGPU] Simplify conditional expressions. NFC. (#129228)Jay Foad
2025-02-26[AMDGPU][True16][CodeGen] 16bit spill support in true16 mode (#128060)Brox Chen
2025-02-26[AMDGPU] Do not allow M0 as v_readlane_b32 dst (#128867)Pierre van Houtryve
2025-02-26[AMDGPU] Do not allow M0 as v_readfirstlane_b32 dst (#128851)Pierre van Houtryve
2025-02-25[AMDGPU][True16][CodeGen] uaddsat/usubsat true16 selection in gisel (#128233)Brox Chen
2025-02-23AMDGPU: Respect amdgpu-no-agpr in functions and with calls (#128147)Matt Arsenault
2025-02-07AMDGPU: Use default shouldRewriteCopySrc (#125535)Matt Arsenault
2025-01-24[AMDGPU] Restore SP from saved-FP or saved-BP (#124007)Aaditya
2025-01-23[AMDGPU] Occupancy w.r.t. workgroup size range is also a range (#123748)Lucas Ramirez
2025-01-11Revert "[ADT] Fix specialization of ValueIsPresent for PointerUnion" (#122557)Sergei Barannikov
2025-01-10[ADT] Fix specialization of ValueIsPresent for PointerUnion (#121847)Sergei Barannikov
2024-12-17AMDGPU: Delete spills of undef values (#119684)Matt Arsenault
2024-12-12[AMDGPU] Mark AGPR tuple implicit in the first instr of AGPR spills. (#115285)Pravin Jagtap
2024-12-11Reapply "DiagnosticInfo: Clean up usage of DiagnosticInfoInlineAsm" (#119575)...Matt Arsenault
2024-12-11Revert "DiagnosticInfo: Clean up usage of DiagnosticInfoInlineAsm" (#119575)Vitaly Buka
2024-12-11DiagnosticInfo: Clean up usage of DiagnosticInfoInlineAsm (#119485)Matt Arsenault
2024-11-25AMDGPU: Pass HwMode to AMDGPUGenRegisterInfo (#117449)Matt Arsenault
2024-11-13AMDGPU: Fix using illegal VOP3 literal in frame index elimination (#115747)Matt Arsenault
2024-11-09[Target] Migrate away from PointerUnion::{is,get,dyn_cast} (NFC) (#115623)Kazu Hirata
2024-11-05AMDGPU: Fix clobbering temp reg for large frame indexes in VOP3 users (#114924)Matt Arsenault
2024-11-04AMDGPU: Fix broken frame index expansion for v_add_co_u32_e64 (#114634)Matt Arsenault
2024-10-21Reland [AMDGPU] Serialize WWM_REG vreg flag (#110229) (#112492)Akshat Oke
2024-10-17[AMDGPU] Factor out getNumUsedPhysRegs(). NFC. (#112624)Stanislav Mekhanoshin
2024-10-15Revert "[AMDGPU] Serialize WWM_REG vreg flag (#110229)"Peter Collingbourne
2024-10-14[AMDGPU] Serialize WWM_REG vreg flag (#110229)Akshat Oke
2024-10-07AMDGPU: Try to reuse dest reg for s_add_i32 frame indexes (#111201)Matt Arsenault
2024-10-03Reapply "[AMDGPU]Optimize SGPR spills (#93668)"vikashgu
2024-10-02AMDGPU: Handle v_add* in eliminateFrameIndex (#102346)Matt Arsenault
2024-10-01AMDGPU: Mark scc dead when materialized frame base registersMatt Arsenault
2024-09-30[AMDGPU] Split vgpr regalloc pipeline (#93526)Christudasan Devadasan
2024-09-11[AMDGPU] Make more use of getWaveMaskRegClass. NFC. (#108186)Jay Foad
2024-08-22AMDGPU: Handle folding frame indexes into s_add_i32 (#101694)Matt Arsenault
2024-08-14[AMDGPU][NFC] Rename isHi() to isHi16Reg() for clarity. (#103888)Ivan Kosarev
2024-08-08AMDGPU: Support VALU add instructions in localstackalloc (#101692)Matt Arsenault
2024-08-05[AMDGPU] Optimize the register uses if offset inlinable (#101676)Pankaj Dwivedi
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