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path: root/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
AgeCommit message (Expand)Author
2022-01-28[AMDGPU] SILoadStoreOptimizer: break lists on instructions with side effectsJay Foad
2022-01-27[AMDGPU] SILoadStoreOptimizer: reject AGPR DS_WRITE soonerJay Foad
2022-01-27[AMDGPU] SILoadStoreOptimizer: use separate lists for AGPR instructionsJay Foad
2022-01-27[AMDGPU] SILoadStoreOptimizer: tweak API of CombineInfo::setMI. NFC.Jay Foad
2022-01-27[AMDGPU] SILoadStoreOptimizer: Allow merging across a swizzled accessJay Foad
2022-01-27[AMDGPU] SILoadStoreOptimizer: Remove redundant check for volatileJay Foad
2022-01-19[AMDGPU] Simplify SILoadStoreOptimizer::getSubRegIdxs. NFC.Jay Foad
2021-12-28[llvm] Use nullptr instead of 0 (NFC)Kazu Hirata
2021-11-26[AMDGPU] Make vector superclasses allocatableChristudasan Devadasan
2021-11-12[AMDGPU][NFC] Fix typosNeubauer, Sebastian
2021-11-02Fix building with GCC 12:Martin Liska
2021-09-02[AMDGPU] Add merging into S_BUFFER_LOAD_DWORDX8_IMMPiotr Sobczak
2021-08-17[AMDGPU] Make BVH isel consistent with other MIMG opcodesCarl Ritson
2021-05-11AMDGPU: Fix SILoadStoreOptimizer for gfx90aMatt Arsenault
2021-03-15[AMDGPU] Fixed msan failure with uninitialized valueStanislav Mekhanoshin
2021-03-15[AMDGPU] Use single cache policy operandStanislav Mekhanoshin
2021-02-24AMDGPU: Add even aligned VGPR/AGPR register classesMatt Arsenault
2021-02-17[AMDGPU] Fixed msan buildStanislav Mekhanoshin
2021-02-17[AMDGPU] gfx90a supportStanislav Mekhanoshin
2021-02-11[AMDGPU] Better selection of base offset when merging DS reads/writesJay Foad
2021-02-10[AMDGPU] Fix comments in SILoadStoreOptimizer::offsetsCanBeCombinedJay Foad
2021-01-20[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargetsdfukalov
2021-01-07[NFC][AMDGPU] Reduce include files dependency.dfukalov
2020-09-16[AMDGPU] gfx1030 RT supportStanislav Mekhanoshin
2020-08-20[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegisterJay Foad
2020-07-16AMDGPU: Rename add/sub with carry out instructionsMatt Arsenault
2020-07-08SILoadStoreOptimizer: add support for GFX10 image instructionsJay Foad
2020-06-29AMDGPU: Use IsSSA property check instead of asserting on isSSAMatt Arsenault
2020-04-24AMDGPU: Break read2/write2 search range on a memory fenceMatt Arsenault
2020-04-23AMDGPU: Fix redundant membersMatt Arsenault
2020-04-23AMDGPU: Use RegisterMatt Arsenault
2020-04-23[AMDGPU] Use SGPR instead of SReg classesJay Foad
2020-04-02[AMDGPU] Fix crash in SILoadStoreOptimizerStanislav Mekhanoshin
2020-02-10[AMDGPU] Add a16 feature to gfx10Sebastian Neubauer
2020-01-31Reapply "AMDGPU: Cleanup and fix SMRD offset handling"Matt Arsenault
2020-01-30Revert "AMDGPU: Cleanup and fix SMRD offset handling"Matt Arsenault
2020-01-30AMDGPU: Cleanup and fix SMRD offset handlingMatt Arsenault
2020-01-24AMDGPU/SILoadStoreOptimizer: Fix uninitialized variable errorTom Stellard
2020-01-24AMDGPU/SILoadStoreOptimizer: Improve merging of out of order offsetsTom Stellard
2019-12-17AMDGPU/SILoadStoreOptimillzer: Refactor CombineInfo structTom Stellard
2019-12-12AMDGPU/SILoadStoreOptimizer: Simplify functionTom Stellard
2019-11-20[AMDGPU][SILoadStoreOptimizer] Merge TBUFFER loads/storesPiotr Sobczak
2019-11-20[AMDGPU] Keep consistent check of legal addressing mode.Michael Liao
2019-11-16AMDGPU/SILoadStoreOptimizer: fix a likely bug introduced recentlyNicolai Hähnle
2019-11-13Sink all InitializePasses.h includesReid Kleckner
2019-11-03[SILoadStoreOptimizer] Fixed typo. NFCI.Dávid Bolvanský
2019-10-16[AMDGPU] Extend the SI Load/Store optimizerPiotr Sobczak
2019-10-10AMDGPU: Use SGPR_128 instead of SReg_128 for vregsMatt Arsenault
2019-10-09AMDGPU: Relax register classes usedMatt Arsenault
2019-10-04[AMDGPU][SILoadStoreOptimizer] NFC: Refactor codePiotr Sobczak
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