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path: root/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
AgeCommit message (Expand)Author
2025-07-01AMDGPU: Implement ds_atomic_async_barrier_arrive_b64/ds_atomic_barrier_arrive...Changpeng Fang
2025-06-29AMDGPU: Implement intrinsic/builtins for gfx1250 load transpose instructions ...Changpeng Fang
2025-06-26[AMDGPU][SDAG] Add ISD::PTRADD DAG combines (#142739)Fabian Ritter
2025-06-26AMDGPU: Avoid report_fatal_error in image intrinsic lowering (#145201)Matt Arsenault
2025-06-24Revert "[AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (… (#14...Chinmay Deshpande
2025-06-23CodeGen: Emit error if getRegisterByName fails (#145194)Matt Arsenault
2025-06-23AMDGPU: Fix typo in argument allocation error message (#145265)Matt Arsenault
2025-06-23[AMDGPU] Extend wave reduce intrinsics for i32 type (#126469)Aaditya
2025-06-23AMDGPU: Avoid report_fatal_error on ds ordered intrinsics (#145202)Matt Arsenault
2025-06-22AMDGPU: Avoid report_fatal_error for reporting libcalls (#145134)Matt Arsenault
2025-06-22AMDGPU: Avoid report_fatal_error for getRegisterByName subtarget case (#145173)Matt Arsenault
2025-06-20[AMDGPU] Do not replace SALU floating point multiply with VALU-only ldexp (#1...Jay Foad
2025-06-20AMDGPU: Remove AMDGPUInstrInfo class (#144984)Matt Arsenault
2025-06-19AMDGPU/GFX12: Fix s_barrier_signal_isfirst for single-wave workgroups (#143634)Nicolai Hähnle
2025-06-18AMDGPU: Directly select minimumnum/maximumnum with ieee_mode=0 (#141903)Matt Arsenault
2025-06-17AMDGPU: Combine nnan fminimum/fmaximum to fminnum_ieee/fmaxnum_ieee (#142217)Matt Arsenault
2025-06-13[AMDGPU][SDAG] Initial support for ISD::PTRADD (#141725)Fabian Ritter
2025-06-06AMDGPU: Custom lower fptrunc vectors for f32 -> f16 (#141883)Changpeng Fang
2025-06-05[AMDGPU] Make <2 x bfloat> fabs legal (#142908)Stanislav Mekhanoshin
2025-06-05[AMDGPU] Remove duplicated/confusing helpers. NFCI (#142598)Diana Picus
2025-06-04[AMDGPU] Make <2 x bfloat> fneg legal (#142870)Stanislav Mekhanoshin
2025-06-05[AMDGPU][AtomicExpand] Use full flat emulation if a target supports f64 globa...Shilei Tian
2025-05-31AMDGPU: Improve v32f16/v32bf16 copysign handling (#142177)Matt Arsenault
2025-05-31AMDGPU: Improve v16f16/v16bf16 copysign handling (#142176)Matt Arsenault
2025-05-31AMDGPU: Improve v8f16/v8bf16 copysign handling (#142175)Matt Arsenault
2025-05-31AMDGPU: Improve v4f16/v4bf16 copysign handling (#142174)Matt Arsenault
2025-05-31AMDGPU: Make copysign with matching v2f16/v2bf16 inputs legal (#142173)Matt Arsenault
2025-05-30AMDGPU: Handle vectors in copysign sign type combine (#142157)Matt Arsenault
2025-05-30AMDGPU: Handle vectors in copysign magnitude sign case (#142156)Matt Arsenault
2025-05-28AMDGPU: Add is.shared/is.private intrinsics to isBoolSGPR (#141804)Matt Arsenault
2025-05-28AMDGPU: Add overflow operations to isBoolSGPR (#141803)Matt Arsenault
2025-05-28AMDGPU: Add is_fpclass to isBoolSGPR (#141801)Matt Arsenault
2025-05-28Warn on misuse of DiagnosticInfo classes that hold Twines (#137397)Justin Bogner
2025-05-22AMDGPU: Form v_med_f32 from minimumnum/maximumnum immediate pattern (#141048)Matt Arsenault
2025-05-21[AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (#140946)Brox Chen
2025-05-19[AMDGPU] Add a new amdgcn.load.to.lds intrinsic (#137425)Krzysztof Drewniak
2025-05-17[llvm] Use llvm::find_if (NFC) (#140412)Kazu Hirata
2025-05-15AMDGPU: Make v2f32 -> v2f16 legal when target supports v_cvt_pk_f16_f32 (#139...Changpeng Fang
2025-05-09AMDGPU: Add minimumnum/maximumnum to list of canonicalizing opcodes (#139124)Matt Arsenault
2025-05-09AMDGPU: Form min3/max3 from minimumnum/maximumnum (#139137)Matt Arsenault
2025-05-08[AMDGPU] Legalize vector fminimum and fmaximum with VOP3P (#138971)Stanislav Mekhanoshin
2025-05-08AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (#128911)Brox Chen
2025-05-06[AMDGPU] Fix VTList for BUFFER_LOAD and DENORM_MODE (#138704)Jay Foad
2025-05-05[AMDGPU] Support arbitrary types in amdgcn.dead (#134841)Diana Picus
2025-05-04[llvm] Remove unused local variables (NFC) (#138478)Kazu Hirata
2025-05-04[Target] Remove unused local variables (NFC) (#138443)Kazu Hirata
2025-04-30[AMDGPU] Fix undefined scc register in successor block of SI_KILL terminators...mssefat
2025-04-25AMDGPU: Use poison in some lowering contexts (#137325)Matt Arsenault
2025-04-24[AMDGPU] Use variadic isa<>. NFC. (#137016)Jay Foad
2025-04-22Reapply "[AMDGPU] Insert readfirstlane in the function returns in sgpr." (#13...Pankaj Dwivedi
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