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path: root/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
AgeCommit message (Expand)Author
2025-09-03AMDGPU: Fold 64-bit immediate into copy to AV class (#155615)Matt Arsenault
2025-09-03AMDGPU: Avoid using exact class check in reg_sequence AGPR fold (#156135)Matt Arsenault
2025-09-02AMDGPU: Stop special casing aligned VGPR targets in operand folding (#155559)Matt Arsenault
2025-08-27AMDGPU: Remove special case of SGPR_LO class in imm folding (#155518)Matt Arsenault
2025-08-27AMDGPU: Fold mov imm to copy to av_32 class (#155428)Matt Arsenault
2025-08-26AMDGPU: Replace copy-to-mov-imm folding logic with class compat checks (#154501)Matt Arsenault
2025-08-18Revert "[AMDGPU] Fold copies of constant physical registers into their uses (...Stanislav Mekhanoshin
2025-08-18[AMDGPU] Fold copies of constant physical registers into their uses (#154183)Stanislav Mekhanoshin
2025-08-07[AMDGPU] bf16 clamp folding (#152573)Stanislav Mekhanoshin
2025-08-04[AMDGPU] Fold into uses of splat REG_SEQUENCEs through COPYs. (#145691)Ivan Kosarev
2025-07-30[AMDGPU] Add v_cvt_sr|pk_bf8|fp8_f16 gfx1250 instructions (#151415)Stanislav Mekhanoshin
2025-07-26AMDGPU: Fix not folding splat immediate into VGPR MFMA src2 (#150628)Matt Arsenault
2025-07-21[AMDGPU] Prevent folding of FI with scale_offset on gfx1250 (#149894)Stanislav Mekhanoshin
2025-07-16AMDGPU: Fix assert when multi operands to update after folding imm (#148205)macurtis-amd
2025-06-26AMDGPU: Handle folding vector splats of inline split f64 inline immediates (#...Matt Arsenault
2025-06-26AMDGPU: Fix tracking subreg defs when folding through reg_sequence (#140608)Matt Arsenault
2025-06-10AMDGPU: Try constant fold after folding immediate (#141862)Matt Arsenault
2025-05-30[AMDGPU] Fix SIFoldOperandsImpl::canUseImmWithOpSel() for VOP3 packed [B]F16 ...Daniil Fukalov
2025-05-29AMDGPU: Remove redundant operand folding checks (#140587)Matt Arsenault
2025-05-29AMDGPU: Delete seemingly dead s_fmaak_f32/s_fmamk_f32 folding code (#140580)Matt Arsenault
2025-05-27[AMDGPU] SIFoldOperands: Delay foldCopyToVGPROfScalarAddOfFrameIndex (#141558)Fabian Ritter
2025-05-23[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)Rahul Joshi
2025-05-19AMDGPU: Check for subreg match when folding through reg_sequence (#140582)Matt Arsenault
2025-05-17AMDGPU: Move reg_sequence splat handling (#140313)Matt Arsenault
2025-05-08[AMDGPU][NFC] Remove unused operand types. (#139062)Ivan Kosarev
2025-05-05[AMDGPU] Handle MachineOperandType global address in SIFoldOperands. (#135424)Akhilesh Moorthy
2025-05-04[Target] Remove unused local variables (NFC) (#138443)Kazu Hirata
2025-04-30[AMDGPU] Fix register class constraints for si-fold-operands pass when foldin...mssefat
2025-04-22[AMDGPU] Do not fold COPY with implicit operands (#136003)Mariusz Sikora
2025-04-19[AMDGPU] Construct SmallVector with iterator ranges (NFC) (#136415)Kazu Hirata
2025-04-02[AMDGPU][True16][CodeGen] fold clamp update for true16 (#128919)Brox Chen
2025-04-02[AMDGPU][True16][CodeGen] Implement sgpr folding in true16 (#128929)Brox Chen
2025-04-01[AMDGPU] Fix SIFoldOperandsImpl::tryFoldZeroHighBits when met non-reg src1 op...Valery Pykhtin
2025-03-17AMDGPU: Use MFPropsModifier modifier in SIFoldOperands (#127752)Matt Arsenault
2025-03-05AMDGPU: Make frame index folding logic consistent with eliminateFrameIndex (#...Matt Arsenault
2025-03-05AMDGPU: Correctly handle folding immediates into subregister use operands (#1...Matt Arsenault
2025-03-04AMDGPU: Try to perform copy to agpr from reg_sequence at the copy (#129463)Matt Arsenault
2025-03-03AMDGPU: Stop introducing v_accvgpr_write_b32 for reg-to-reg copy (#129059)Matt Arsenault
2025-02-28AMDGPU: Use helper function for use/def chain walk (#129052)Matt Arsenault
2025-02-27AMDGPU: Factor agpr reg_sequence folding into a function (#129002)Matt Arsenault
2025-02-27AMDGPU: Fix overly conservative immediate operand check (#127563)Matt Arsenault
2025-02-27AMDGPU: Do not try to commute instruction with same input register (#127562)Matt Arsenault
2025-02-25AMDGPU: More consistently use the fold list instead of direct mutation (#127612)Matt Arsenault
2025-02-22[AMDGPU] Avoid repeated hash lookups (NFC) (#128393)Kazu Hirata
2025-02-19[AMDGPU][True16][CodeGen] true16 codegen pattern for fma (#127240)Brox Chen
2025-02-18AMDGPU: Handle subregister uses in SIFoldOperands constant folding (#127485)Matt Arsenault
2025-02-18AMDGPU: Remove redundant inline constant check (#127582)Matt Arsenault
2025-02-18AMDGPU: Implement getRequiredProperties for SIFoldOperands (#127522)Matt Arsenault
2025-02-14Revert "[AMDGPU][True16][CodeGen] true16 codegen pattern for fma (#12… (#12...Brox Chen
2025-02-14[AMDGPU][True16][CodeGen] true16 codegen pattern for fma (#122950)Brox Chen
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