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path: root/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
AgeCommit message (Expand)Author
2023-07-05[AMDGPU][NFC] Rename SIMCCodeEmitter.cpp to match the new emitter class name.Ivan Kosarev
2023-07-05[AMDGPU] Eliminate SIMCCodeEmitter and de-virtualise encoding methods.Ivan Kosarev
2023-06-26Move SubtargetFeature.h from MC to TargetParserJob Noorman
2023-06-09[AMDGPU,BPF,SystemZ,WebAssembly] Migrate to new encodeInstruction that uses S...Fangrui Song
2023-02-19[llvm] Use APInt::getZero instead of APInt::getNullValue (NFC)Kazu Hirata
2023-02-17Simplify with hasFeature. NFCFangrui Song
2023-02-14Use llvm::bit_cast (NFC)Kazu Hirata
2023-01-23[MC] Make more use of MCInstrDesc::operands. NFC.Jay Foad
2022-11-29[AMDGPU] Add support for new LLVM vector typesMateja Marjanovic
2022-11-25[AMDGPU][MC] Refactor MC Code Emitter to avoid using magic valuesDmitry Preobrazhensky
2022-11-08[AMDGPU] Add & use `hasNamedOperand`, NFCPierre van Houtryve
2022-08-08[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFCFangrui Song
2022-08-03[AMDGPU][MC][GFX10] Correct encoding of VOP3 v_cmpx* opcodesDmitry Preobrazhensky
2022-07-30Fix Wdocumentation warning. NFC.Simon Pilgrim
2022-07-26[AMDGPU][MC][GFX11] Correct encoding of VOP3/VOP3_DPP v_cmpx* opcodesDmitry Preobrazhensky
2022-07-14[CodeGen] Move instruction predicate verification to emitInstructionDavid Green
2022-07-13Revert "Move instruction predicate verification to emitInstruction"David Green
2022-07-13Move instruction predicate verification to emitInstructionDavid Green
2022-06-07Reland [AMDGPU] gfx11 vop3dpp instructionsJoe Nash
2022-06-06Revert "[AMDGPU] gfx11 vop3dpp instructions"Joe Nash
2022-06-06[AMDGPU] gfx11 vop3dpp instructionsJoe Nash
2022-03-24[AMDGPU] Support gfx940 smfmac instructionsStanislav Mekhanoshin
2022-02-16[NFC][MC] remove unused argument `MCRegisterInfo` in `MCCodeEmitter`Shao-Ce SUN
2022-02-09Cleanup LLVMMC headersserge-sans-paille
2021-10-13[AMDGPU] Remove unneeded emit literal checkJoe Nash
2021-10-11[AMDGPU] Support shared literals in FMAMK/FMAAKJoe Nash
2021-06-24[AMDGPU] Add 224-bit vector types and link 192-bit types to MVTsCarl Ritson
2021-03-02[AMDGPU][MC][GFX9+] Corrected encoding of op_sel_hi for unused operands in VOP3PDmitry Preobrazhensky
2021-02-17[AMDGPU] gfx90a supportStanislav Mekhanoshin
2021-02-12[AMDGPU] Fix Windows buildStanislav Mekhanoshin
2021-02-12[AMDGPU] Allow accvgpr_read/write decode with opselStanislav Mekhanoshin
2021-02-04[WebAssembly] Support single-floating-point immediate valueDan Gohman
2021-01-07[NFC][AMDGPU] Reduce include files dependency.dfukalov
2020-11-26[AMDGPU] Introduce and use isGFX10Plus. NFC.Jay Foad
2020-06-17AMDGPU: Don't use 16-bit FP inline constants in integer operandsMatt Arsenault
2020-05-06[AMDGPU][MC][GFX9+] Enabled 21-bit signed offsets for SMEM instructionsDmitry Preobrazhensky
2020-04-28[AMDGPU] Define AGPR subregsStanislav Mekhanoshin
2020-04-22[AMDGPU] Add 192-bit register classesJay Foad
2020-04-22[AMDGPU] Add missing AReg classesJay Foad
2020-02-11[AMDGPU] Remove AMDGPURegisterInfoStanislav Mekhanoshin
2019-07-09[AMDGPU] gfx908 mAI instructions, MC partStanislav Mekhanoshin
2019-06-16AMDGPU: Prepare for explicit absolute relocations in code generationNicolai Haehnle
2019-06-13[AMDGPU] gfx1010 base changes for wave32Stanislav Mekhanoshin
2019-05-17[AMDGPU][MC] Enabled expressions for most operands which accept integer valuesDmitry Preobrazhensky
2019-05-02[AMDGPU] gfx1010 allows VOP3 to have a literalStanislav Mekhanoshin
2019-05-01[AMDGPU] gfx1010 MIMG implementationStanislav Mekhanoshin
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth
2018-06-28AMDGPU: Separate R600 and GCN TableGen filesTom Stellard
2018-05-01Remove \brief commands from doxygen comments.Adrian Prantl
2018-01-17[AMDGPU][MC][GFX9] Enable inline constants for SDWA operandsDmitry Preobrazhensky
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