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path: root/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
AgeCommit message (Expand)Author
2024-06-27[AMDGPU] Only reinitialize disassembler Bytes array when needed. NFC. (#96666)Jay Foad
2024-06-18[AMDGPU][MC] Support UC_VERSION_* constants. (#95618)Ivan Kosarev
2024-05-04Add clarifying parenthesis around non-trivial conditions in ternary expressio...luolent
2024-04-26[AMDGPU] Support byte_sel modifier on v_cvt_sr_fp8_f32 and v_cvt_sr_bf8_f32 (...Stanislav Mekhanoshin
2024-04-18 [AMDGPU] Add disassembler diagnostics for invalid kernel descriptors (#87400)Emma Pilkington
2024-02-26[AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (#82992)Jay Foad
2024-02-23[AMDGPU] Simplify AMDGPUDisassembler::getInstruction by removing Res. (#82775)Jay Foad
2024-02-22[AMDGPU] Remove DPP DecoderNamespaces. NFC. (#82491)Jay Foad
2024-02-22[AMDGPU] Clean up conversion of DPP instructions in AMDGPUDisassembler (#82480)Jay Foad
2024-02-22[AMDGPU] Split Dpp8FI and Dpp16FI operands (#82379)Jay Foad
2024-02-20[AMDGPU] Stop using SDWA DecoderNamespaces. NFCI. (#82233)Jay Foad
2024-02-20[AMDGPU] Try decoding instructions longest first. NFCI. (#82014)Jay Foad
2024-02-19[AMDGPU] Fix decoder for BF16 inline constants (#82276)Stanislav Mekhanoshin
2024-02-17[AMDGPU] Set predicates more consistently for BUF instructions (#81865)Jay Foad
2024-02-15[AMDGPU] Use consistent DecoderNamespace for wave64 instructions. NFC. (#81863)Jay Foad
2024-02-13[AMDGPU][NFC] Get rid of some operand decoders defined using macros. (#81482)Ivan Kosarev
2024-02-08[AMDGPU][True16] Support VOP3 source DPP operands. (#80892)Ivan Kosarev
2024-02-01[llvm-objdump][AMDGPU] Pass ELF ABIVersion through disassembler (#78907)Emma Pilkington
2024-01-26Fix MSVC "signed/unsigned mismatch" warning. NFC.Simon Pilgrim
2024-01-25[AMDGPU][NFC] Use templates to decode AV operands. (#79313)Ivan Kosarev
2024-01-24[AMDGPU][NFC] Simplify AGPR/VGPR load/store operand definitions. (#79289)Ivan Kosarev
2024-01-24[AMDGPU] Add GFX12 WMMA and SWMMAC instructions (#77795)Mirko Brkušanin
2024-01-24[AMDGPU][GFX12] VOP encoding and codegen - add support for v_cvt fp8/… (#78...Mariusz Sikora
2024-01-21[AMDGPU] Add an asm directive to track code_object_version (#76267)Emma Pilkington
2024-01-18[AMDGPU] Add global_load_tr for GFX12 (#77772)Piotr Sobczak
2024-01-04AMDGPU: Fix packed 16-bit inline constants (#76522)Nicolai Hähnle
2024-01-02[AMDGPU] Update compute program resource registers for GFX12 (#75911)Jay Foad
2023-12-28[AMDGPU][True16] Don't use the VGPR_LO/HI16 register classes. (#76440)Ivan Kosarev
2023-12-21[AMDGPU] Remove GDS and GWS for GFX12 (#76148)Jay Foad
2023-12-15[AMDGPU] Add pseudo scalar trans instructions for GFX12 (#75204)Mirko Brkušanin
2023-12-15[AMDGPU][MC] Add GFX12 SMEM encoding (#75215)Mirko Brkušanin
2023-12-13[AMDGPU] GFX12: Add Split Workgroup Barrier (#74836)Mariusz Sikora
2023-12-13[AMDGPU] Update IEEE and DX10_CLAMP for GFX12 (#75030)Piotr Sobczak
2023-12-12[AMDGPU] Update VOP instructions for GFX12 (#74853)Mariusz Sikora
2023-12-11[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)Kazu Hirata
2023-12-07[AMDGPU] Add GFX12 encoding for VINTERP instructions (#74616)Jay Foad
2023-12-07[AMDGPU] Add VEXPORT encoding for GFX12 (#74615)Jay Foad
2023-12-06[AMDGPU] GFX12: Add s_prefetch_inst/data instructions (#74448)Mariusz Sikora
2023-12-05[AMDGPU] Add GFX12 encoding and aliases for existing SOP (SALU) instructions ...Jay Foad
2023-12-04[AMDGPU][MC] Add GFX12 VIMAGE and VSAMPLE encodings (#74062)Mirko Brkušanin
2023-10-19AMDGPU: Minor updates to program resource registers (#69525)Konstantin Zhuravlyov
2023-10-12[AMDGPU] Change the representation of double literals in operands (#68740)Stanislav Mekhanoshin
2023-10-10[llvm] Use llvm::endianness::{big,little,native} (NFC)Kazu Hirata
2023-09-25Revert "[AMDGPU] Add [[maybe_unused]] to several unused functions (NFC)"Kazu Hirata
2023-09-25[AMDGPU] Add [[maybe_unused]] to several unused functions (NFC)Kazu Hirata
2023-09-25[AMDGPU][NFC] Add True16 operand definitions.Ivan Kosarev
2023-09-23Reapply "[AMDGPU] Introduce real and keep fake True16 instructions."Ivan Kosarev
2023-09-22Revert "[AMDGPU] Introduce real and keep fake True16 instructions."Ivan Kosarev
2023-09-22[AMDGPU] Introduce real and keep fake True16 instructions.Ivan Kosarev
2023-09-21[AMDGPU] Add gfx1150 SALU Float instructions (#66884)Mirko Brkušanin
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