summaryrefslogtreecommitdiff
path: root/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
AgeCommit message (Expand)Author
2019-03-13[AMDGPU] Silence gcc 7 warningsStanislav Mekhanoshin
2019-03-11[AMDGPU] Mark enum types in SIDefines.h as unsignedStanislav Mekhanoshin
2019-03-05[AMDGPU] Implement AMDGPUMCInstrAnalysisScott Linder
2019-03-04[AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b3...Dmitry Preobrazhensky
2019-02-08[AMDGPU][MC] Added support of lds_direct operandDmitry Preobrazhensky
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth
2018-06-28AMDGPU: Separate R600 and GCN TableGen filesTom Stellard
2018-06-21AMDGPU: Refactor MIMG instruction TableGen using generic tablesNicolai Haehnle
2018-06-21AMDGPU: Turn D16 for MIMG instructions into a regular operandNicolai Haehnle
2018-05-22AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headersTom Stellard
2018-05-15AMDGPU: Add disasm tests for deep learning instructions + fix v_fmac_f32 disasmKonstantin Zhuravlyov
2018-04-30AMDGPU: Add Vega12 and Vega20Matt Arsenault
2018-04-10AMDGPU/MC: Allow disassembling without symbol infoNicolai Haehnle
2018-03-26[AMDGPU] Improve disassembler error handlingTim Corringham
2018-03-12[AMDGPU][MC] Corrected GATHER4 opcodesDmitry Preobrazhensky
2018-02-05[AMDGPU][MC] Corrected dst/data size for MIMG opcodes with d16 modifierDmitry Preobrazhensky
2018-01-30AMDGPU/SI: Add decoding in the GFX80_UNPACKED decoding namespace.Changpeng Fang
2018-01-26[AMDGPU][MC] Added support of 64-bit image atomicsDmitry Preobrazhensky
2018-01-17[AMDGPU][MC][GFX9] Enable inline constants for SDWA operandsDmitry Preobrazhensky
2018-01-10[AMDGPU][MC][GFX8][GFX9] Added XNACK_MASK supportDmitry Preobrazhensky
2017-12-22[AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registersDmitry Preobrazhensky
2017-12-13AMDGPU: Partially fix disassembly of MIMG instructionsMatt Arsenault
2017-12-11[AMDGPU][MC][GFX9] Corrected encoding of ttmp registers, disabled tba/tmaDmitry Preobrazhensky
2017-11-20[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/su...Dmitry Preobrazhensky
2017-08-10[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use war...Eugene Zelenko
2017-08-09[AMDGPU][MC][GFX9] Added 16-bit renamed and "_legacy" VALU opcodesDmitry Preobrazhensky
2017-07-21AMDGPU: Add instruction definitions for some scratch_* instructionsMatt Arsenault
2017-07-18[AMDGPU][MC] Corrected disassembler for proper decoding of v_mqsad_u32_u8Dmitry Preobrazhensky
2017-06-27[AMDGPU] SDWA: several fixes for V_CVT and VOPC instructionsSam Kolton
2017-06-21[AMDGPU][MC][GFX9] Corrected VOP3P relevant code to fix disassembler failuresDmitry Preobrazhensky
2017-06-21[AMDGPU] SDWA: merge VI and GFX9 pseudo instructionsSam Kolton
2017-06-07Move Object format code to lib/BinaryFormat.Zachary Turner
2017-06-06Sort the remaining #include lines in include/... and lib/....Chandler Carruth
2017-05-26[AMDGPU] SDWA: add disassembler support for GFX9Sam Kolton
2017-05-19[AMDGPU][MC] Corrected disassembler to decode instructions with 2 literalsDmitry Preobrazhensky
2017-04-10AMDGPU: Fix crash when disassembling VOP3 macMatt Arsenault
2017-02-27AMDGPU: Add VOP3P instruction formatMatt Arsenault
2017-02-18AMDGPU: Fix disassembly of aperture registersMatt Arsenault
2017-02-15AMDGPU: Replace assert with report_fatal_errorMatt Arsenault
2016-12-10AMDGPU: Fix handling of 16-bit immediatesMatt Arsenault
2016-11-29AMDGPU: Disallow exec as SMEM instruction operandMatt Arsenault
2016-11-15AMDGPU: Replace assert(false) with unreachableMatt Arsenault
2016-11-01AMDGPU: Whitespace fixesMatt Arsenault
2016-10-09Move the global variables representing each Target behind accessor functionMehdi Amini
2016-10-06[AMDGPU] Disassembler: print label names in branch instructionsSam Kolton
2016-09-26Revert "[AMDGPU] Disassembler: print label names in branch instructions"Sam Kolton
2016-09-26[AMDGPU] Disassembler: print label names in branch instructionsSam Kolton
2016-07-19AMDGPU: Expand register indexing pseudos in custom inserterMatt Arsenault
2016-06-10AMDGPU: Fix trailing whitespaceMatt Arsenault
2016-06-09[AMDGPU] Disassembler: Support for sdwa instructionsSam Kolton