summaryrefslogtreecommitdiff
path: root/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
AgeCommit message (Expand)Author
2021-05-14[AMDGPU][AsmParser/Disassembler] Correct A16 and G16 handlingDavid Stuttard
2021-04-26[MC][AMDGPU][llvm-objdump] Synthesized local labels in disassemblyTim Renouf
2021-04-16[AMDGPU] NFC, Comment in disassembler for dpp8Joe Nash
2021-03-24AMDGPU: Add target id and code object v4 supportKonstantin Zhuravlyov
2021-03-15[AMDGPU] Use single cache policy operandStanislav Mekhanoshin
2021-02-17[AMDGPU] gfx90a supportStanislav Mekhanoshin
2021-01-22[llvm] Use static_assert instead of assert (NFC)Kazu Hirata
2021-01-20[AMDGPU][MC] Add tfe disassembler support MIMG opcodesPetar Avramovic
2021-01-19[AMDGPU] Simpler names for arch-specific ttmp registers. NFC.Jay Foad
2021-01-07[Target] Use llvm::find_if (NFC)Kazu Hirata
2021-01-07[NFC][AMDGPU] Reduce include files dependency.dfukalov
2020-12-15[AMDGPU] Clarify scratch initializationTony
2020-11-26[AMDGPU] Introduce and use isGFX10Plus. NFC.Jay Foad
2020-11-05[AMDGPU] Add default 1 glc operand to rtn atomicsStanislav Mekhanoshin
2020-10-13[AMDGPU] Add MC layer support for v_fmac_legacy_f32Jay Foad
2020-10-08[AMDGPU] Add patterns for mad/mac legacy f32 instructionsJay Foad
2020-10-07[AMDGPU] Support disassembly for AMDGPU kernel descriptorsRonak Chauhan
2020-09-16[AMDGPU] gfx1030 RT supportStanislav Mekhanoshin
2020-09-09Revert "[AMDGPU] Support disassembly for AMDGPU kernel descriptors"Ronak Chauhan
2020-09-08[AMDGPU] Support disassembly for AMDGPU kernel descriptorsRonak Chauhan
2020-08-19Revert "[AMDGPU] Support disassembly for AMDGPU kernel descriptors"Ronak Chauhan
2020-08-19[AMDGPU] Support disassembly for AMDGPU kernel descriptorsRonak Chauhan
2020-06-15[AMDGPU] Add gfx1030 targetStanislav Mekhanoshin
2020-05-28[AMDGPU][MC][DISASSEMBLER] Corrected decoder to consume each code fragment on...Dmitry Preobrazhensky
2020-05-06[AMDGPU][MC][GFX9+] Enabled 21-bit signed offsets for SMEM instructionsDmitry Preobrazhensky
2020-04-22[AMDGPU] Add missing AReg classesJay Foad
2020-02-11[AMDGPU] Remove AMDGPURegisterInfoStanislav Mekhanoshin
2020-02-10[NFC] Refactor the tuple of symbol information with structure for llvm-objdumpdiggerlin
2020-01-14CMake: Make most target symbols hidden by defaultTom Stellard
2020-01-11[Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()Fangrui Song
2019-12-04[AMDGPU][MC] Remove duplicate code introduced in r359316.Jay Foad
2019-11-05[AMDGPU] return Fail instead of SolfFail from addOperand()Stanislav Mekhanoshin
2019-10-04[AMDGPU][MC][GFX10][WS32] Corrected decoding of dst operand for v_cmp_*_sdwa ...Dmitry Preobrazhensky
2019-10-04[AMDGPU][MC][GFX10] Enabled decoding of 'null' operandDmitry Preobrazhensky
2019-07-09[AMDGPU] gfx908 mAI instructions, MC partStanislav Mekhanoshin
2019-07-09[AMDGPU] gfx908 register file changesStanislav Mekhanoshin
2019-06-20[AMDGPU] gfx1010 core wave32 changesStanislav Mekhanoshin
2019-06-18[AMDGPU] gfx1010 disassembler changes for wave32Stanislav Mekhanoshin
2019-06-12[AMDGPU] gfx1010 dpp16 and dpp8Stanislav Mekhanoshin
2019-06-11Revert CMake: Make most target symbols hidden by defaultTom Stellard
2019-06-10CMake: Make most target symbols hidden by defaultTom Stellard
2019-06-03[AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operandsDmitry Preobrazhensky
2019-05-22AMDGPU: Move disassembler support check to constructorMatt Arsenault
2019-05-22MC: Allow getMaxInstLength to depend on the subtargetMatt Arsenault
2019-05-14[AMDGPU] Create a TargetInfo header. NFCRichard Trieu
2019-05-01[AMDGPU] gfx1010 MIMG implementationStanislav Mekhanoshin
2019-04-26[AMDGPU] gfx1010 VOP2 changesStanislav Mekhanoshin
2019-04-24[AMDGPU] gfx1010 sgpr register changesStanislav Mekhanoshin
2019-04-06[AMDGPU] Sort out and rename multiple CI/VI predicatesStanislav Mekhanoshin
2019-03-20[AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit, priva...Dmitry Preobrazhensky