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path: root/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
AgeCommit message (Expand)Author
2022-12-04[MC] llvm::Optional => std::optionalFangrui Song
2022-12-02[Target] Use std::nullopt instead of None (NFC)Kazu Hirata
2022-11-29[AMDGPU] Add support for new LLVM vector typesMateja Marjanovic
2022-11-29[AMDGPU][MC][MI100+] Enable VOP3 variants of dot2c/dot4c/dot8c opcodesDmitry Preobrazhensky
2022-11-22[AMDGPU] Make aperture registers 64 bitPierre van Houtryve
2022-11-14[AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.Ivan Kosarev
2022-11-08[AMDGPU] Add & use `hasNamedOperand`, NFCPierre van Houtryve
2022-10-11[AMDGPU] Make the uses_dynamic_stack field in the kernel descriptor and the m...Abinav Puthan Purayil
2022-10-11[AMDGPU] Make disassembler convertFMAanyK call more genericJoe Nash
2022-10-07[AMDGPU] Fix a warningKazu Hirata
2022-10-07[AMDGPU][MC][GFX11] Correct v_fmac_.*_e64_dppDmitry Preobrazhensky
2022-09-29[AMDGPU][MC][GFX11] Disable non-null src0 for s_waitcnt_*cntDmitry Preobrazhensky
2022-09-21Revert "[NFC][AMDGPU] Refactor AMDGPUDisassembler"Scott Linder
2022-09-20[NFC][AMDGPU] Refactor AMDGPUDisassemblerScott Linder
2022-09-20[AMDGPU][GFX11] Use VGPR_32_Lo128 for VOP1,2,CJoe Nash
2022-09-03Drop empty string literals from static_assert (NFC)Kazu Hirata
2022-08-01[AMDGPU][MC][GFX940] Correct disassembly of MFMA opcodesDmitry Preobrazhensky
2022-07-18[AMDGPU] Add the uses_dynamic_stack field to the kernel descriptor and the ke...Abinav Puthan Purayil
2022-07-15[AMDGPU][MC][GFX11] Correct disassembly of *_e64_dpp opcodes which support op...Dmitry Preobrazhensky
2022-06-30[AMDGPU] gfx11 WMMA instruction supportPiotr Sobczak
2022-06-24[AMDGPU] gfx11 VOPD instructions MC supportJoe Nash
2022-06-23[AMDGPU][MC][GFX11] Correct disassembly of VOP3.DPP8 opcodesDmitry Preobrazhensky
2022-06-20[AMDGPU][MC][GFX11] Correct disassembly of DPP variants of VOPC64 opcodesDmitry Preobrazhensky
2022-06-09[AMDGPU] gfx11 VOPC instructionsJoe Nash
2022-06-08[AMDGPU] gfx11 VOP3P instruction MC supportJoe Nash
2022-06-08Reland [AMDGPU] gfx11 VOP1+VOP2 Instruction MC supportJoe Nash
2022-06-07Reland [AMDGPU] gfx11 vop3dpp instructionsJoe Nash
2022-06-06Revert "[AMDGPU] gfx11 vop3dpp instructions"Joe Nash
2022-06-06Revert "[AMDGPU] gfx11 VOP1+VOP2 Instruction MC support"Joe Nash
2022-06-06[AMDGPU] gfx11 VOP1+VOP2 Instruction MC supportJoe Nash
2022-06-06[AMDGPU] gfx11 vop3dpp instructionsJoe Nash
2022-05-31[AMDGPU] gfx11 Image instructionsJoe Nash
2022-05-25[MCDisassembler] Disambiguate Size parameter in tryAddingSymbolicOperand()Maksim Panchenko
2022-05-25[AMDGPU] gfx11 vinterp instructions MC supportJoe Nash
2022-05-25[AMDGPU] gfx11 export instructionsJoe Nash
2022-05-18[AMDGPU][MC][GFX940] Correct tied operand decoding for smfmac opcodesDmitry Preobrazhensky
2022-05-17[AMDGPU] gfx11 scalar alu instructionsJoe Nash
2022-05-16[AMDGPU] gfx11 BUF InstructionsJoe Nash
2022-05-15Rename `MCFixedLenDisassembler.h` as `MCDecoderOps.h`Sheng
2022-05-11[AMDGPU] gfx11 Decode wider instructions. NFCJoe Nash
2022-03-25[Disassember][NFCI] Use strong type for instruction decoderMaksim Panchenko
2022-03-24[AMDGPU] Support gfx940 smfmac instructionsStanislav Mekhanoshin
2022-03-17[AMDGPU] Allow v_accvgpr_write to use SGPR src on gfx940Stanislav Mekhanoshin
2022-02-09Cleanup LLVMMC headersserge-sans-paille
2021-10-11[AMDGPU] Support shared literals in FMAMK/FMAAKJoe Nash
2021-10-08Move TargetRegistry.(h|cpp) from Support to MCReid Kleckner
2021-08-17[AMDGPU] Make BVH isel consistent with other MIMG opcodesCarl Ritson
2021-07-22[AMDGPU] Add VReg_192/VReg_224 support for MIMG instructionsCarl Ritson
2021-06-08[AMDGPU] Add v5f32/VReg_160 support for MIMG instructionsCarl Ritson
2021-05-14[AMDGPU] Add support for architected flat scratchStanislav Mekhanoshin
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