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path: root/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
AgeCommit message (Expand)Author
2021-01-04[NewPM][AMDGPU] Port amdgpu-printf-runtime-bindingArthur Eubanks
2021-01-04[NewPM][AMDGPU] Port amdgpu-unify-metadataArthur Eubanks
2021-01-04[NewPM][AMDGPU] Port amdgpu-propagate-attributes-early/lateArthur Eubanks
2021-01-04[NewPM][AMDGPU] Run InternalizePass when -amdgpu-internalize-symbolsArthur Eubanks
2020-12-29[NewPM][AMDGPU] Port amdgpu-lower-kernel-attributesArthur Eubanks
2020-12-28[NewPM] Port infer-address-spacesArthur Eubanks
2020-12-28[AMDGPU][NewPM] Port amdgpu-promote-alloca(-to-vector)Arthur Eubanks
2020-12-28[NewPM][AMDGPU] Port amdgpu-simplifylib/amdgpu-usenativeArthur Eubanks
2020-11-20[AMDGPU] Set the default globals address space to 1Alex Richardson
2020-11-16[InferAddrSpace] Teach to handle assumed address space.Michael Liao
2020-10-28[AMDGPU] Fix insert of SIPreAllocateWWMRegs in FastRegAllocCarl Ritson
2020-10-27[amdgpu] Add the late codegen preparation pass.Michael Liao
2020-10-27[AMDGPU] Move WQM Pass after MI SchedulerCarl Ritson
2020-10-20[HazardRec] Allow inserting multiple wait-states simultaneouslyAustin Kerbow
2020-10-16[AMDGPU] Run hazard recognizer pass laterAustin Kerbow
2020-10-04[OldPM] Pass manager: run SROA after (simple) loop unrollingRoman Lebedev
2020-09-14[AMDGPU] Don't cluster storesJay Foad
2020-09-09[GlobalISel] Enable usage of BranchProbabilityInfo in IRTranslator.Amara Emerson
2020-09-01[amdgpu] Run SROA after loop unrolling.Michael Liao
2020-08-28[Attributes] Add a method to check if an Attribute has AttrKind None. Use ins...Craig Topper
2020-08-15AMDGPU: Remove SIFixupVectorISel passMatt Arsenault
2020-07-31Support addrspacecast initializers with isNoopAddrSpaceCastMatt Arsenault
2020-07-11[AMDGPU] Move LowerSwitch pass to CodeGenPrepare.Christudasan Devadasan
2020-07-03[AMDGPU] Unify early PS termination blocksCarl Ritson
2020-06-17[AMDGPU] Simplify GCNPassConfig::addOptimizedRegAlloc. NFC.Jay Foad
2020-06-09[AMDGPU] Enable structurizer workarounds by defaultSameer Sahasrabuddhe
2020-05-21[AMDGPU] Promote alloca to vector in optStanislav Mekhanoshin
2020-05-14[AMDGPU] New SIInsertHardClauses passJay Foad
2020-05-07[AMDGPU] Cluster shader exportsCarl Ritson
2020-05-04[AMDGPU] Enable carry out ADD/SUB operations divergence driven instruction se...alex-t
2020-04-15Introduce fix-irreducible passSameer Sahasrabuddhe
2020-04-15Revert "Introduce fix-irreducible pass"Sameer Sahasrabuddhe
2020-04-15Introduce fix-irreducible passSameer Sahasrabuddhe
2020-04-09[AMDGPU] Remove outdated commentJay Foad
2020-04-08MIR: Use RegisterMatt Arsenault
2020-04-06[AMDGPU] Disable 'Skip Uniform Regions' optimization by default for AMDGPU.Konstantin Pyzhov
2020-04-06Revert e1730cfeb3588f20dcf4a96b181ad52761666e52Konstantin Pyzhov
2020-04-06[AMDGPU] Disable 'Skip Uniform Regions' optimization by default for AMDGPU.Konstantin Pyzhov
2020-03-30Introduce unify-loop-exits pass.Sameer Sahasrabuddhe
2020-03-27AMDGPU: Stop setting attributes based on TargetOptionsMatt Arsenault
2020-03-25[AMDGPU] Preserve original symbol during attribute propagationStanislav Mekhanoshin
2020-03-25[AMDGPU] Add SIPreEmitPeephole pass.cdevadas
2020-03-23Implement wave32 DWARF register mappingRam Nalamothu
2020-03-19[AMDGPU] Add Scratch Wave Offset to Scratch Buffer Descriptor in entry functionsScott Linder
2020-03-19[AMDGPU][NFC] Refactor some uses of unsigned to RegisterScott Linder
2020-03-13AMDGPU: Add flag to used fixed function ABIMatt Arsenault
2020-02-24AMDGPU/GlobalISel: Introduce post-legalize combinerMatt Arsenault
2020-02-17GlobalISel: Allow running localizer earlierMatt Arsenault
2020-02-17AMDGPU/GlobalISel: Run the localizer passMatt Arsenault
2020-02-12[AMDGPU] Add one more pass to LLVMInitializeAMDGPUTargetJay Foad
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