summaryrefslogtreecommitdiff
path: root/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
AgeCommit message (Expand)Author
2021-08-04[AMDGPU] Handle functions in llvm's global ctors and dtors listReshabh Sharma
2021-07-29Take OptimizationLevel class out of Pass BuilderTarindu Jayatilaka
2021-07-24[AMDGPU] Deduce attributes with the AttributorKuter Dinel
2021-07-21[AMDGPU] Move perfhint analysisStanislav Mekhanoshin
2021-07-20[AMDGPU] Improve register computation for indirect callsSebastian Neubauer
2021-07-15[AMDGPU] Refine -O0 and -O1 passes.Stanislav Mekhanoshin
2021-07-13RegAlloc: Allow targets to split register allocationMatt Arsenault
2021-07-08[amdgpu] Remove the GlobalDCE pass prior to the internalization pass.Michael Liao
2021-07-07[AMDGPU] Disable garbage collection passesStanislav Mekhanoshin
2021-07-06[AMDGPU] isPassEnabled() helper to check cl::opt and OptLevelStanislav Mekhanoshin
2021-07-06[AMDGPU] Move atomic expand past infer address spacesStanislav Mekhanoshin
2021-07-06[AMDGPU] Do not run IR optimizations at -O0Stanislav Mekhanoshin
2021-06-30[AMDGPU] Add S_MOV_B64_IMM_PSEUDO for wide constantsStanislav Mekhanoshin
2021-06-26Disable ReplaceLDS pass, patch up tests to matchJon Chesterfield
2021-06-21[AMDGPU] Add Optimize VGPR LiveRange Pass.Ruiling Song
2021-06-21[AMDGPU] Replace non-kernel function uses of LDS globals by pointers.hsmahesha
2021-05-12[AMDGPU] Disable the SIFormMemoryClauses pass at -O1Baptiste Saleil
2021-05-11[AMDGPU] Move code sinking before structurizerPiotr Sobczak
2021-05-07[NewPM] Hide pass manager debug logging behind -debug-pass-manager-verboseArthur Eubanks
2021-05-07[AMDGPU] Serialize MFInfo::ScavengeFISebastian Neubauer
2021-05-04[AMDGPU] Disable the scalar IR, SDWA and load store vectorizer passes at -O1Baptiste Saleil
2021-04-26[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impactsBaptiste Saleil
2021-04-19[AMDGPU] Remove MachineDCE after SIFoldOperandsJay Foad
2021-04-17[AMDGPU] Add GlobalDCE before internalization passYaxun (Sam) Liu
2021-04-15[AMDGPU] Disable forceful inline of non-kernel functions which use LDS.hsmahesha
2021-04-14[AMDGPU] Rename "LDS lowering" pass name.hsmahesha
2021-04-13[AMDGPU] Set implicit arg attributes for indirect callsmadhur13490
2021-04-09Revert "[AMDGPU] Remove MachineDCE after SIFoldOperands"Mitch Phillips
2021-04-09[AMDGPU] Remove MachineDCE after SIFoldOperandsJay Foad
2021-04-07[AMDGPU] Split GCNRegBankReassignStanislav Mekhanoshin
2021-04-01[AMDGPU] Remove SIAddIMGInit pass which is now unusedJay Foad
2021-04-01[AMDGPU][GlobalISel] Add IMG init in selectImageIntrinsicJay Foad
2021-04-01[AMDGPU][SDag] Add IMG init in AdjustInstrPostInstrSelectionJay Foad
2021-03-20[AMDGPU] Rename SIInsertSkips PassCarl Ritson
2021-03-20[AMDGPU] Merge SIRemoveShortExecBranches into SIPreEmitPeepholeCarl Ritson
2021-03-15[amdgpu] Implement lower function LDS passJon Chesterfield
2021-03-05Reland AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelectPetar Avramovic
2021-03-04Revert "AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect"Nico Weber
2021-03-04AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelectPetar Avramovic
2021-03-02[AArch64][GlobalISel] Enable use of the optsize predicate in the selector.Amara Emerson
2021-02-19Make fixed-abi default for AMD HSA OSmadhur13490
2021-01-22[NewPM][AMDGPU] Skip adding CGSCCOptimizerLate callbacks at O0Arthur Eubanks
2021-01-21[AMDGPU][Inliner] Remove amdgpu-inline and add a new TTI inline hookArthur Eubanks
2021-01-21[AMDGPU][GlobalISel] Run SIAddImgInitJay Foad
2021-01-21AMDGPU: Add occupancy to serialized MachineFunctionInfoMatt Arsenault
2021-01-07[NFC][AMDGPU] Reduce include files dependency.dfukalov
2021-01-05[NFC] Rename registerAliasAnalyses -> registerDefaultAliasAnalysesArthur Eubanks
2021-01-04[NewPM][AMDGPU] Pass TargetMachine to AMDGPUSimplifyLibCallsPassArthur Eubanks
2021-01-04[NewPM][AMDGPU] Make amdgpu-aa work with NewPMArthur Eubanks
2021-01-04[NewPM][AMDGPU] Port amdgpu-always-inlineArthur Eubanks
generated by cgit v1.2.3 (git 2.25.1) at 2026-10-27 12:19:15 +0000