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path: root/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
AgeCommit message (Expand)Author
2024-06-24Revert "[IR] Lazily initialize the class to pass name mapping (NFC) (#96321)"Nikita Popov
2024-06-24[IR] Lazily initialize the class to pass name mapping (NFC) (#96321)Nikita Popov
2024-06-24Revert "[AMDGPU]Optimize SGPR spills (#93668)"vg0204
2024-06-18[AMDGPU]Optimize SGPR spills (#93668)Vikash Gupta
2024-06-18[NFC][AMDGPU] Make AMDGPUSplitModule a ModulePass (#95773)Pierre van Houtryve
2024-06-07[NewPM][CodeGen] Port `regallocfast` to new pass manager (#94426)paperchalice
2024-06-06[AMDGPU] Implement variadic functions by IR lowering (#93362)Jon Chesterfield
2024-06-04Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)paperchalice
2024-06-02Revert "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94146)paperchalice
2024-06-02[NewPM][CodeGen] Port selection dag isel to new pass manager (#83567)paperchalice
2024-05-27Reland "[AMDGPU] Add AMDGPU-specific module splitting (#89245)"Pierre van Houtryve
2024-05-23Revert "[AMDGPU] Add AMDGPU-specific module splitting" (#93275)Vitaly Buka
2024-05-23[AMDGPU] Add AMDGPU-specific module splitting (#89245)Pierre van Houtryve
2024-05-19[NewPM][AMDGPU] Add CodeGenPassBuilder (#91040)paperchalice
2024-04-17AMDGPU: Move libcall simplify into PeepholeEP (#88853)Matt Arsenault
2024-03-22[NewPM][AMDGPU] Add AMDGPUPassRegistry.def (#86095)paperchalice
2024-03-21(Reland) [AMDGPU] Run LowerLDS at the end of the fullLTO pipeline (#85626)Pierre van Houtryve
2024-03-18Revert "[AMDGPU] Run LowerLDS at the end of the fullLTO pipeline (#75333)"pvanhout
2024-03-18[AMDGPU] Run LowerLDS at the end of the fullLTO pipeline (#75333)Pierre van Houtryve
2024-03-06[AMDGPU] Add IR-level pass to rewrite away address space 7 (#77952)Krzysztof Drewniak
2024-03-06Restore "Implement convergence control in MIR using SelectionDAG (#71785)"Sameer Sahasrabuddhe
2024-03-04Revert "Restore "Implement convergence control in MIR using SelectionDAG (#71...Mitch Phillips
2024-03-04Restore "Implement convergence control in MIR using SelectionDAG (#71785)"Sameer Sahasrabuddhe
2024-02-27[AMDGPU] Do not attempt to fallback to default mutations (#83208)Jeffrey Byrnes
2024-02-25[CodeGen] Port AtomicExpand to new Pass Manager (#71220)Rishabh Bali
2024-02-23[AMDGPU] Introduce iglp_opt(2): Generalized exp/mfma interleaving for select ...Jeffrey Byrnes
2024-02-21Revert "Implement convergence control in MIR using SelectionDAG (#71785)"Sameer Sahasrabuddhe
2024-02-21Implement convergence control in MIR using SelectionDAG (#71785)Sameer Sahasrabuddhe
2024-02-01Fix Passing TargetOptions by Value in TargetMachines for AMDGPU (#79866)Matin Raayai
2024-01-18[AMDGPU] Add mark last scratch load pass (#75512)Mirko BrkuĊĦanin
2024-01-03[CodeGen] Add flag to populate target pass names (#76328)paperchalice
2023-12-19GFX12: Add LoopDataPrefetchPass (#75625)Mariusz Sikora
2023-12-15[AMDGPU] - Add address space for strided buffers (#74471)Jessica Del
2023-12-14[AMDGPU] Enable GCNRewritePartialRegUses pass by default. (#72975)Valery Pykhtin
2023-12-13AMDGPU/GlobalISel: add AMDGPUGlobalISelDivergenceLowering pass (#75340)Petar Avramovic
2023-12-13[AMDGPU] Update IEEE and DX10_CLAMP for GFX12 (#75030)Piotr Sobczak
2023-12-11[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)Kazu Hirata
2023-11-24[AMDGPU] New AMDGPUInsertSingleUseVDST pass (#72388)Jay Foad
2023-11-08[AMDGPU] Move WWM register pre-allocation to during regalloc (#70618)Carl Ritson
2023-11-07AMDGPU: Port AMDGPUAttributor to new pass manager (#71349)Matt Arsenault
2023-11-01[AMDGPU] GCNRegPressurePrinter pass to print GCNRegPressure values for testin...Valery Pykhtin
2023-10-12[HIP][LLVM][Opt] Add LLVM support for `hipstdpar`Alex Voicu
2023-10-11Revert "[HIP][LLVM][Opt] Add LLVM support for `hipstdpar`"Alex Voicu
2023-10-11[HIP][LLVM][Opt] Add LLVM support for `hipstdpar`Alex Voicu
2023-10-10Revert "[HIP][LLVM][Opt] Add LLVM support for `hipstdpar`" in order to addres...Alex Voicu
2023-10-10[HIP][LLVM][Opt] Add LLVM support for `hipstdpar`Alex Voicu
2023-10-06[AMDGPU][IGLP] SingleWaveOpt: Cache DSW Counters from PreRA (#67759)Jeffrey Byrnes
2023-09-26[AMDGPU] New image intrinsic optimizer pass (#67151)Jay Foad
2023-09-14[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#6...Arthur Eubanks
2023-09-12[AMDGPU] Fix a warningKazu Hirata
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