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path: root/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
AgeCommit message (Expand)Author
2025-09-04[AMDGPU][Legalizer] Avoid pack/unpack for G_FSHR (#156796)Anshil Gandhi
2025-09-04[AMDGPU][gfx1250] Add 128B cooperative atomics (#156418)Pierre van Houtryve
2025-08-28[AMDGPU] Remove `ApproxFuncFPMath` uses (#155578)paperchalice
2025-08-19[AMDGPU] Narrow only on store to pow of 2 mem location (#150093)Tiger Ding
2025-08-11[AMDGPU] Per-subtarget DPP instruction classification (#153096)Stanislav Mekhanoshin
2025-08-07[AMDGPU] Fix buffer addressing mode matching (#152584)Stanislav Mekhanoshin
2025-08-05[AMDGPU] Implement addrspacecast from flat <-> private on gfx1250 (#152218)Stanislav Mekhanoshin
2025-07-31[AMDGPU] Remove `UnsafeFPMath` uses (#151079)paperchalice
2025-07-30[AMDGPU][GISel] Use buildObjectPtrOffset instead of buildPtrAdd (#150899)Fabian Ritter
2025-07-29[AMDGPU] gfx1250 V_{MIN|MAX}_{I|U}64 opcodes (#151256)Stanislav Mekhanoshin
2025-07-29[AMDGPU] Support f64 atomics on gfx1250 (#151172)Changpeng Fang
2025-07-23[AMDGPU] Add V_ADD|SUB|MUL_U64 gfx1250 opcodes (#150291)Stanislav Mekhanoshin
2025-07-15[AMDGPU] gfx1250 64-bit relocations and fixups (#148951)Stanislav Mekhanoshin
2025-07-15AMDGPU: Support intrinsic selection for gfx1250 wmma instructions (#148957)Changpeng Fang
2025-07-08[AMDGPU] Add FeatureIEEEMinimumMaximumInsts. NFCI. (#147594)Stanislav Mekhanoshin
2025-06-18AMDGPU: Directly select minimumnum/maximumnum with ieee_mode=0 (#141903)Matt Arsenault
2025-06-08[llvm] Compare std::optional<T> to values directly (NFC) (#143340)Kazu Hirata
2025-06-06AMDGPU: Custom lower fptrunc vectors for f32 -> f16 (#141883)Changpeng Fang
2025-05-28Warn on misuse of DiagnosticInfo classes that hold Twines (#137397)Justin Bogner
2025-05-23[AMDGPU] Correct bitshift legality transformation for small vectors (#140940)zGoldthorpe
2025-05-21AMDGPU/GlobalISel: Start legalizing minimumnum and maximumnum (#140900)Matt Arsenault
2025-05-08[GlobalISel][AMDGPU] Fix handling of v2i128 type for AND, OR, XOR (#138574)Chinmay Deshpande
2025-05-07[AMDGPU][Legalizer] Widen i16 G_SEXT_INREG (#131308)Pierre van Houtryve
2025-05-05[AMDGPU] Support arbitrary types in amdgcn.dead (#134841)Diana Picus
2025-04-17AMDGPU: Fix the double rounding issue in v2f64 -> v2f16 conversion (#135659)Changpeng Fang
2025-04-16Reapply "[AMDGPU][GlobalISel] Properly handle lane op lowering for larger vec...Vikram Hegde
2025-04-14Revert "[AMDGPU][GlobalISel] Properly handle lane op lowering for larger vect...Kazu Hirata
2025-04-15[AMDGPU][GlobalISel] Properly handle lane op lowering for larger vector types...Vikram Hegde
2025-03-29[GlobalISel][NFC] Rename GISelKnownBits to GISelValueTracking (#133466)Tim Gymnich
2025-03-19[AMDGPU] Support image_bvh8_intersect_ray instruction and intrinsic. (#130041)Mariusz Sikora
2025-03-19[AMDGPU] Add intrinsic and MI for image_bvh_dual_intersect_ray (#130038)Mariusz Sikora
2025-03-18[NFC][AMDGPU][GlobalISel] Make LLTs constexpr (#131673)Tim Gymnich
2025-03-17[AMDGPU][GlobalISel] Enable vector reductions (#131413)Tim Gymnich
2025-03-06[AMDGPU][NFC] Update name for BVH Intersect Ray (#130036)Mariusz Sikora
2025-03-04[AMDGPU] Don't store an immediate in a Register. NFCCraig Topper
2025-02-25[AMDGPU][True16][CodeGen] uaddsat/usubsat true16 selection in gisel (#128233)Brox Chen
2025-02-25AMDGPU: Drop legacy r600.read.global.size intrinsics from amdgcn (#128700)Matt Arsenault
2025-02-20Revert "AMDGPU: Don't canonicalize fminnum/fmaxnum if targets support IEEE fm...Matt Arsenault
2025-02-19AMDGPU: Don't canonicalize fminnum/fmaxnum if targets support IEEE fminimum(m...Changpeng Fang
2025-02-17AMDGPU: Stop emitting an error on illegal addrspacecasts (#127487)Matt Arsenault
2025-02-11[AMDGPU][NFC] Remove an unneeded return value. (#126739)Ivan Kosarev
2025-01-18[CodeGen] Use Register/MCRegister::isPhysical. NFCCraig Topper
2024-12-12[GlobalISel][NFC] Fix LLT Propagation (#119587)Tim Gymnich
2024-12-08Revert "[amdgpu][lds] Simplify error diag path - lds variable names are no lo...Jon Chesterfield
2024-12-08[amdgpu][lds] Simplify error diag path - lds variable names are no longer spe...Jon Chesterfield
2024-12-02AMDGPU: Add support for V_CVT_PK_F16_F32 instruction for gfx950 (#118300)Matt Arsenault
2024-11-13[AMDGPU] Remove unused includes (NFC) (#116154)Kazu Hirata
2024-11-06[AMDGPU] modify named barrier builtins and intrinsics (#114550)Gang Chen
2024-11-05[AMDGPU] Extend type support for update_dpp intrinsic (#114597)Stanislav Mekhanoshin
2024-11-01Reapply "[AMDGPU][GlobalISel] Fix load/store of pointer vectors, buffer.*.pN ...Krzysztof Drewniak
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