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path: root/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
AgeCommit message (Expand)Author
2025-09-04[AMDGPU] Tail call support for whole wave functions (#145860)Diana Picus
2025-09-03[AMDGPU] Implement IR expansion for frem instruction (#130988)Frederik Harwath
2025-09-02[CG] Add VTs for v[567]i1 and v[567]f16 (#156523)Adam Nemet
2025-08-28[AMDGPU] Remove `ApproxFuncFPMath` uses (#155578)paperchalice
2025-08-22[AMDGPU] canCreateUndefOrPoisonForTargetNode - BFE_I32/U32 can't create poiso...Simon Pilgrim
2025-08-20AMDGPU: Fix using illegal extract_subvector indexes (#154098)Matt Arsenault
2025-08-19[AMDGPU] upstream barrier count reporting part1 (#154409)Gang Chen
2025-08-18[AMDGPU] Combine prng(undef) -> undef (#154160)Stanislav Mekhanoshin
2025-08-05Revert "[CG] Add VTs for v[567]i1 and v[567]f16" (#152217)Adam Nemet
2025-08-05[LLVM][CGP] Allow finer control for sinking compares. (#151366)Paul Walker
2025-08-02[CG] Add VTs for v[567]i1 and v[567]f16 (#151763)Adam Nemet
2025-07-31[AMDGPU] Remove `UnsafeFPMath` uses (#151079)paperchalice
2025-07-28[NFC][AMDGPU] Move cmp+select arguments optimization to SIISelLowering. (#150...Daniil Fukalov
2025-07-28[CodeGen] More consistently expand float ops by default (#150597)Nikita Popov
2025-07-21[AMDGPU] Remove some duplicated lines. NFC. (#128029)Jay Foad
2025-07-21[AMDGPU] ISel & PEI for whole wave functions (#145858)Diana Picus
2025-07-16[AMDGPU] Try to reuse register with the constant from compare in v_cndmask (#...Daniil Fukalov
2025-07-15[AMDGPU] gfx1250 64-bit relocations and fixups (#148951)Stanislav Mekhanoshin
2025-07-14[AMDGPU] Add support for `v_tanh_bf16` on gfx1250 (#147425)Shilei Tian
2025-07-09[AMDGPU] Create hi-half of 64-bit ashr with mov of -1 (#146569)LU-JOHN
2025-07-08[DAG] Add generic expansion for ISD::FCANONICALIZE nodes (#142105)Dominik Steenken
2025-07-07[AMDGPU] Preserve exact flag for lshr (#146744)LU-JOHN
2025-07-07[AMDGPU][NFC] Fix typo "store" -> "load" in comment for AMDGPUTLI::performLoa...Fabian Ritter
2025-06-26[AMDGPU] Convert 64-bit sra to 32-bit if shift amt >= 32 (#144421)LU-JOHN
2025-06-23AMDGPU: Use reportFatalUsageError for unhandled calling conventions (#145261)Matt Arsenault
2025-06-20AMDGPU: Remove AMDGPUInstrInfo class (#144984)Matt Arsenault
2025-06-13[AMDGPU] Convert more 64-bit lshr to 32-bit if shift amt>=32 (#138204)LU-JOHN
2025-05-30[AMDGPU] Extend SRA i64 simplification for shift amts in range [33:62] (#138913)LU-JOHN
2025-05-28Warn on misuse of DiagnosticInfo classes that hold Twines (#137397)Justin Bogner
2025-05-16[AMDGPU] Handle min/max in isNarrowingProfitable (#140206)Pierre van Houtryve
2025-05-09AMDGPU: Use poison instead of undef in more lowerings (#139208)Matt Arsenault
2025-05-09AMDGPU: Handle minimumnum/maximumnum in fneg combines (#139133)Matt Arsenault
2025-05-08AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (#128911)Brox Chen
2025-05-05AMDGPU: Fix gcc -Wenum-compare warning (#138529)Matt Arsenault
2025-04-23[DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (#1...Simon Pilgrim
2025-04-18[DAG] isKnownNeverNaN - add DemandedElts element mask to isKnownNeverNaN call...Simon Pilgrim
2025-04-02[Clang][AMDGPU] Add __builtin_amdgcn_cvt_off_f32_i4 (#133741)Juan Manuel Martinez Caamaño
2025-03-29[GlobalISel][NFC] Rename GISelKnownBits to GISelValueTracking (#133466)Tim Gymnich
2025-03-28AMDGPU: Convert vector 64-bit shl to 32-bit if shift amt >= 32 (#132964)LU-JOHN
2025-03-20[AMDGPU] Dynamic VGPR support for llvm.amdgcn.cs.chain (#130094)Diana Picus
2025-03-18[CodeGen][GlobalISel] Add a getVectorIdxWidth and getVectorIdxLLT. (#131526)David Green
2025-03-03[AMDGPU] Simplify conditional expressions. NFC. (#129228)Jay Foad
2025-02-13AMDGPU: Reduce shl64 to shl32 if shift range is [63-32] (#125574)LU-JOHN
2025-02-04AMDGPU: Generalize truncate of shift of cast build_vector combine (#125617)Matt Arsenault
2024-12-21[SelectionDAG] Virtualize isTargetStrictFPOpcode / isTargetMemoryOpcode (#119...Sergei Barannikov
2024-12-18[SelectionDAG] Add SDNode::user_begin() and use it in some places (#120509)Craig Topper
2024-12-18[SelectionDAG] Rename SDNode::uses() to users(). (#120499)Craig Topper
2024-12-10[DAGCombine] Remove oneuse restrictions for RISCV in folding (shl (add_nsw x,...LiqinWeng
2024-12-08Revert "[amdgpu][lds] Simplify error diag path - lds variable names are no lo...Jon Chesterfield
2024-12-08[amdgpu][lds] Simplify error diag path - lds variable names are no longer spe...Jon Chesterfield
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