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path: root/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
AgeCommit message (Expand)Author
2023-07-20AMDGPU: Add flag to disable fdiv processing in IR passMatt Arsenault
2023-07-14[AMDGPU] Relax restrictions on unbreakable PHI users in BreakLargePHispvanhout
2023-07-11AMDGPU: Partially fix not respecting dynamic denormal modeMatt Arsenault
2023-07-07AMDGPU: Delete custom combine on class intrinsicMatt Arsenault
2023-07-05AMDGPU: Always use v_rcp_f16 and v_rsq_f16Matt Arsenault
2023-05-26[AMDGPUCodegenPrepare] Add NewPM SupportAnshil Gandhi
2023-05-22[AMDGPU] Handle multiple occurences of an incoming value in break large PHIspvanhout
2023-05-18AMDGPU: Pattern match fract instructions in AMDGPUCodeGenPrepareMatt Arsenault
2023-05-15[AMDGPU] Improve PHI-breaking heuristics in CGPpvanhout
2023-04-29AMDGPU: Don't try to create pointer bitcasts in load wideningMatt Arsenault
2023-04-14[AMDGPU] Less aggressively break large PHIspvanhout
2023-03-28[AMDGPU] Break-up large PHIs for DAGISelpvanhout
2023-03-06[AMDGPU] Use UniformityAnalysis in CodeGenPreparepvanhout
2023-02-23[AMDGPU] Split SIModeRegisterDefaults out of AMDGPUBaseInfo. NFC.Jay Foad
2023-02-14Use llvm::bit_cast (NFC)Kazu Hirata
2022-12-14[AMDGPU] Stop using make_pair and make_tuple. NFC.Jay Foad
2022-11-16AMDGPU: Create poison values instead of undefMatt Arsenault
2022-10-12AMDGPU: Fix assertion on <1 x i16> vectorsMatt Arsenault
2022-07-04[AMDGPUCodeGenPrepare] Check result of ConstantFoldBinaryOpOperands()Nikita Popov
2022-02-18[AMDGPU][NFC] Fix typosSebastian Neubauer
2022-01-03[ValueTracking][SelectionDAG] Rename ComputeMinSignedBits->ComputeMaxSignific...Craig Topper
2022-01-03[AMDGPU] Use ComputeMinSignedBits and KnownBits::countMaxActiveBits to simpli...Craig Topper
2021-10-29[AMDGPU] Change numBitsSigned for simplicity and document it. NFC.Jay Foad
2021-10-26[AMDGPU] Enable 48-bit mul in AMDGPUCodeGenPrepare.Abinav Puthan Purayil
2021-10-15[AMDGPU] Avoid redundant calls to numBits in AMDGPUCodeGenPrepare::replaceMul...Abinav Puthan Purayil
2021-10-15[AMDGPU] Fix width check for signed mul24 generation.Abinav Puthan Purayil
2021-10-14[AMDGPU] Fix 24-bit mul intrinsic generation for > 32-bit result.Abinav Puthan Purayil
2021-09-20[AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test comm...Jacob Lambert
2021-09-13[AMDGPU] Minor cleanup after D109483. NFC.Jay Foad
2021-06-18[AMDGPU] [CodeGen] Fold negate llvm.amdgcn.class into test maskAnshil Gandhi
2021-06-06[CodeGen] Add missing includes (NFC)Nikita Popov
2021-04-17Normalize interaction with boolean attributesSerge Guelton
2021-01-21AMDGPU: Use more accurate fast f64 fdivMatt Arsenault
2021-01-20[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargetsdfukalov
2021-01-07[NFC][AMDGPU] Reduce include files dependency.dfukalov
2020-09-03SelectionDAG.h - remove unnecessary FunctionLoweringInfo.h include. NFCI.Simon Pilgrim
2020-08-24AMDGPU: Add flag to disable promotion of uniform i16 opsMatt Arsenault
2020-07-08[AMDGPU] Fix and simplify AMDGPUCodeGenPrepare::expandDivRem32Jay Foad
2020-06-29[Alignment][NFC] Migrate AMDGPU backend to AlignGuillaume Chatelet
2020-06-15[AMDGPU] Add gfx1030 targetStanislav Mekhanoshin
2020-05-13[SVE] Remove usages of VectorType::getNumElements() from AMDGPUChristopher Tetreault
2020-05-08[AMDGPU] Try to determine sign bit during div/rem expansionNikita Popov
2020-04-19[TTI] Clean up includes (NFC).Florian Hahn
2020-04-10[AMDGPU] Disable sub-dword scralar loads IR wideningStanislav Mekhanoshin
2020-04-02AMDGPU: Remove denormal subtarget featuresMatt Arsenault
2020-02-17[IRBuilder] Avoid passing IRBuilder by value; NFCNikita Popov
2020-02-14AMDGPU: Don't preserve analyses with div64 IR expansionMatt Arsenault
2020-02-14AMDGPU: Add option to disable CGP division expansionMatt Arsenault
2020-02-14AMDGPU: Add option to expand 64-bit integer division in IRMatt Arsenault
2020-02-11AMDGPU: Use conditions directly in division expansionMatt Arsenault
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