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AgeCommit message (Expand)Author
2025-09-10Revert "[DAGCombiner] Relax condition for extract_vector_elt combine" (#157953)Arthur Eubanks
2025-09-10[RISCV][GISel] Widen G_ABDS/G_ABDU before lowering when Zbb is enabled. (#157...Craig Topper
2025-09-10[ExpandVectorPredication] Expand vp_merge and vp_select in expandPredication....Craig Topper
2025-09-10[GISel] Combine shift + trunc + shift pattern (#155583)jyli0116
2025-09-10[CodeGen] Fix handling dead redefs in finalizeBundle (#157427)Jay Foad
2025-09-10[AMDGPU] Change expand-fp opt level argument syntax (#157408)Frederik Harwath
2025-09-10[DAGCombiner] Relax condition for extract_vector_elt combine (#157658)ZhaoQi
2025-09-09[ExpandVectorPredication] Add vp.select to foldEVLIntoMask. (#157720)Craig Topper
2025-09-09[MachineOutliner] Add profile guided outlining (#154437)Ellis Hoag
2025-09-08[DAG] Generalize fold (not (neg x)) -> (add X, -1) (#154348)guan jian
2025-09-08[llvm][DebugInfo] Emit DW_OP_lit0/1 for constant boolean values (#157167)Laxman Sole
2025-09-08[AArch64][GlobalISel] Fix passing <3 x ptr> via the stack. (#157247)David Green
2025-09-08MC: Add Triple overloads for more MC constructors (#157321)Matt Arsenault
2025-09-06[SelectionDAG][ARM] Propagate fast math flags in visitBRCOND (#156647)paperchalice
2025-09-05[ExpandVectorPredication] Change function returns from Value* to bool. NFC (#...Craig Topper
2025-09-05[ExpandVectorPredication] Support vp.merge in foldEVLIntoMask. (#157195)Craig Topper
2025-09-05[TargetInstrInfo][AArch64] Don't assume register came from operand 0 in canCo...Craig Topper
2025-09-05[X86] Fix expand-fp on optnone functions (#156900)Frederik Harwath
2025-09-05[RISCV][GISel] Lower G_ABDS and G_ABDU (#155888)Shaoce SUN
2025-09-05[SelectionDAG] Clean up SCALAR_TO_VECTOR handling in SimplifyDemandedVectorEl...Björn Pettersson
2025-09-05[DAG] SelectionDAG::canCreateUndefOrPoison - AVGFLOOR/AVGCEIL don't create un...Simon Pilgrim
2025-09-04[AArch64][SME] Resume streaming-mode on entry to exception handlers (#156638)Benjamin Maxwell
2025-09-04[AMDGPU] Tail call support for whole wave functions (#145860)Diana Picus
2025-09-04[CodeGen] Remove ExpandInlineAsm hook (#156617)Nikita Popov
2025-09-04[DAGCombine] Propagate nuw when evaluating sub with narrower types (#156710)Yingwei Zheng
2025-09-03[GlobalISel] Add multi-way splitting support for wide scalar shifts. (#155353)Amara Emerson
2025-09-03[RISCV][GlobalISel] Lower G_ATOMICRMW_SUB via G_ATOMICRMW_ADD (#155972)Kane Wang
2025-09-03[AMDGPU] Implement IR expansion for frem instruction (#130988)Frederik Harwath
2025-09-03[CodeGen] Fix failing assert in interleaved access pass (#156457)David Sherwood
2025-09-03[AMDGPU] si-peephole-sdwa: reuse getOne{NonDBGUse,Def} (NFC) (#156455)Frederik Harwath
2025-09-02[NFC] RuntimeLibcalls: Prefix the impls with 'Impl_' (#153850)Daniel Paoliello
2025-09-02[Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (#...Sam Tebbs
2025-09-02support branch hint for AtomicExpandImpl::expandAtomicCmpXchg (#152366)zhijian lin
2025-09-01[llvm][DebugInfo] Support DW_AT_linkage_names that are different between decl...Michael Buch
2025-09-01[PseudoProbe] Support emitting to COFF object (#123870)Haohai Wen
2025-08-31[SelectionDAG] Return std::optional<unsigned> from getValidShiftAmount and fr...Craig Topper
2025-08-31[CodeGen] Drop disjoint flag when reassociating (#156218)Philip Reames
2025-08-31[TargetLowering] Only freeze LHS and RHS if they are used multiple times in e...AZero13
2025-08-30[SelectionDAG] Add computeKnownBits for ISD::ROTL/ROTR. (#156142)Craig Topper
2025-08-30[CodeGen] Remove a dead assignment (NFC) (#156202)Kazu Hirata
2025-08-30Revert "Emit DW_OP_lit0/1 for constant boolean values" (#156172)Michael Buch
2025-08-30Emit DW_OP_lit0/1 for constant boolean values (#155539)Laxman Sole
2025-08-29[DwarfDebug] Avoid generating extra DW_TAG_subprogram entries (#154636)Vladislav Dzhidzhoev
2025-08-29[llvm] Support building with c++23 (#154372)Kyle Krüger
2025-08-29[IR][CodeGen] Remove "approx-func-fp-math" attribute (#155740)paperchalice
2025-08-28[ValueTracking][SelectionDAG] Use KnownBits::reverseBits/byteSwap. NFC (#155847)Craig Topper
2025-08-28[KnownBits] Add operator<<=(unsigned) and operator>>=(unsigned). NFC (#155751)Craig Topper
2025-08-28[TargetLoweringObjectFile] Handle riscv BE (#155166)Djordje Todorovic
2025-08-28[CodeGen][TLI] Allow targets to custom expand atomic load/stores (#154708)Pierre van Houtryve
2025-08-27[CodeGen][RISCV] Add support of RISCV nontemporal to vector predication instr...daniel-trujillo-bsc
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