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path: root/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
AgeCommit message (Expand)Author
2025-06-27[TargetLowering] Fold (a | b) ==/!= b -> (a & ~b) ==/!= 0 when and-not exists...AZero13
2025-06-27DAG: Check libcall function is supported before emission (#144314)Matt Arsenault
2025-06-25[SelectionDAG] Fold undemanded operand to UNDEF for VECTOR_SHUFFLE (#145524)Björn Pettersson
2025-06-22[SelectionDAG] Handle `fneg`/`fabs`/`fcopysign` in `SimplifyDemandedBits` (#1...Iris Shi
2025-06-20[LLVM][CodeGen][SVE] Add isel for bfloat unordered reductions. (#143540)Paul Walker
2025-06-17DAG: Move soft float predicate management into RuntimeLibcalls (#142905)Matt Arsenault
2025-06-10DAG: Assert fcmp uno runtime calls are boolean values (#142898)Matt Arsenault
2025-06-09[SDAG] Add partial_reduce_sumla node (#141267)Philip Reames
2025-06-04Revert "[SDAG] Fix fmaximum legalization errors (#142170)"Nikita Popov
2025-06-04Revert "[SelectionDAG] Avoid one comparison when legalizing fmaximum (#142732)"Nikita Popov
2025-06-04[SelectionDAG] Avoid one comparison when legalizing fmaximum (#142732)Nikita Popov
2025-06-04expandFMINIMUMNUM_FMAXIMUMNUM: Quiet is not needed for NaN vs NaN (#139237)YunQiang Su
2025-06-02[SDAG] Fix fmaximum legalization errors (#142170)Nikita Popov
2025-05-23[GISel] Add KnownFPClass Analysis to GISelValueTrackingPass (#134611)Tim Gymnich
2025-05-21[TargetLowering] Use getExtractSubvector/getExtractVectorElt. NFCCraig Topper
2025-05-19[APInt] Added APInt::clearBits() method (#137098)Liam Semeria
2025-05-16[SelectionDAG] Rename MemSDNode::getOriginalAlign to getBaseAlign. NFC (#139930)Craig Topper
2025-05-15[llvm] Use llvm::stable_sort (NFC) (#140067)Kazu Hirata
2025-05-13DAG: Stop forcibly adding nsz to expanded minnum/maxnum (#139615)Matt Arsenault
2025-05-12[SelectionDAG] Fix incorrect fold condition in foldSetCCWithFunnelShift. (#13...Rux124
2025-05-04[llvm] Remove unused local variables (NFC) (#138467)Kazu Hirata
2025-05-04[CodeGen] Remove unused local variables (NFC) (#138441)Kazu Hirata
2025-04-23[DAG] shouldReduceLoadWidth - add optional<unsigned> byte offset argument (#1...Simon Pilgrim
2025-04-23[SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (#101786)Sergei Barannikov
2025-04-18[DAG] isKnownNeverNaN - add DemandedElts element mask to isKnownNeverNaN call...Simon Pilgrim
2025-04-14[CodeGen] Prune headers and move code out of line for build efficiency, NFC (...Reid Kleckner
2025-04-10[CodeGen] Simplify expandRoundInexactToOdd (#134988)Jay Foad
2025-04-03[SelectionDAG] Use SimplifyDemandedBits from SimplifyDemandedVectorElts Bitca...David Green
2025-03-29[GlobalISel][NFC] Rename GISelKnownBits to GISelValueTracking (#133466)Tim Gymnich
2025-03-13[SDAG] Pass pointer type to libcall expansion for SoftenFloatRes stack slots ...Benjamin Maxwell
2025-03-02Move MIPS-specific GPRel32Directive and EK_GPRel32BlockAddress from generic c...Fangrui Song
2025-02-20Revert "AMDGPU: Don't canonicalize fminnum/fmaxnum if targets support IEEE fm...Matt Arsenault
2025-02-19AMDGPU: Don't canonicalize fminnum/fmaxnum if targets support IEEE fminimum(m...Changpeng Fang
2025-02-18[SelectionDAG] Add PARTIAL_REDUCE_U/SMLA ISD Nodes (#125207)James Chesterman
2025-02-04DAG: Move scalarizeExtractedVectorLoad to TargetLowering (#122670)Matt Arsenault
2025-02-03[AArch64][SDAG] Detect non-zeroes in truncating buildvectors in fshl lowering...David Green
2025-01-27[TargetLowering] Inline the only caller of one of the forceExpandWideMUL func...Craig Topper
2025-01-25[TargetLowering] Pull similar code out of the forceExpandWideMUL into a helpe...Craig Topper
2025-01-23[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)Craig Topper
2025-01-21[TargetLowering] Use getShiftAmountConstant. NFC (#123802)Craig Topper
2025-01-20[SDAG] Add an ISD node to help lower vector.extract.last.active (#118810)Graham Hunter
2025-01-09[SelectionDAG] Use SDNode::op_iterator instead of SDNodeIterator. NFC (#122147)Craig Topper
2025-01-06[DAG] expandUINT_TO_FP - use getShiftAmountConstant helper. NFC.Simon Pilgrim
2024-12-05[NVPTX] Fix lowering of i1 SETCC (#115035)Alex MacLean
2024-12-04[DAG] SimplifyDemandedVectorElts - add handling for INT<->FP conversions (#11...Simon Pilgrim
2024-12-03[TargetLowering] Use Type* instead of EVT in shouldSignExtendTypeInLibCall. (...Craig Topper
2024-12-03[SelectionDAG] Rename CallOptions::IsSExt to IsSigned. NFC (#118574)Craig Topper
2024-11-22[Clang] Attribute NoFPClass should not prevent tail call optimization. (#116741)Félix-Antoine Constantin
2024-11-16[DAG] SimplifyDemandedVectorElts - add SimplifyMultipleUse handling to SEXT/Z...Simon Pilgrim
2024-11-14[TargetLowering] Use Correct VT for Multi-out Asm (#116024)Sam Elliott