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path: root/llvm/lib/CodeGen/MachineVerifier.cpp
AgeCommit message (Expand)Author
2022-11-14[TableGen] Use MemoryEffects to represent intrinsic memory effects (NFCI)Nikita Popov
2022-11-04[IR] Switch everything to use memory attributeNikita Popov
2022-10-25[MachineVerifier] Try harder to verify LiveVariablesJay Foad
2022-10-22Revert "[MachineVerifier] Try harder to verify LiveVariables"Jay Foad
2022-10-21[MachineVerifier] Try harder to verify LiveVariablesJay Foad
2022-09-22[GlobalISel] Enforce G_ASSERT_ALIGN to have a valid alignment > 0.Amara Emerson
2022-09-22MachineVerifier: Verify REG_SEQUENCEMatt Arsenault
2022-09-05[MachineVerifier] Fix crash on early clobbered subreg operands.Daniil Fukalov
2022-08-19[MachineVerifier] add checks for INLINEASM_BRNick Desaulniers
2022-08-16Untangle the mess which is MachineBasicBlock::hasAddressTaken().Eli Friedman
2022-07-17[CodeGen] Qualify auto variables in for loops (NFC)Kazu Hirata
2022-07-12[MachineVerifier] Try harder to verify LiveStacksJay Foad
2022-06-10Fix interaction of CFI instructions with MachineOutliner.Eli Friedman
2022-05-27[GlobalISel] Add G_IS_FPCLASSSerge Pavlov
2022-04-22GlobalISel: Relax handling of G_ASSERT_* with source register classesMatt Arsenault
2022-04-11GlobalISel: Verify atomic load/store ordering restrictionMatt Arsenault
2022-04-05MachineVerifier: Diagnose undef set on full register defsMatt Arsenault
2022-03-16[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated ...Shengchen Kan
2022-03-16Cleanup codegen includesserge-sans-paille
2022-03-10Revert "Cleanup codegen includes"Nico Weber
2022-03-10Cleanup codegen includesserge-sans-paille
2022-03-01[nfc][codegen] Move RegisterBank[Info].h under CodeGenMircea Trofin
2022-02-23[NFC] Remove unnecessary "#include"s from header filesBill Wendling
2022-01-28[MVerifier] Don't check liveness of any debug instruction operandsJeremy Morse
2021-12-21[GlobalISel] Verify operand types for G_SHL, G_LSHR, G_ASHRJay Foad
2021-12-16[MachineVerifier] Undef subreg operands do not require subrangesJay Foad
2021-12-05[GlobalISel] Allow DBG_VALUE to use undefined vregs before LiveDebugValues.Jack Andersen
2021-11-28[llvm] Use range-based for loops (NFC)Kazu Hirata
2021-11-25[llvm] Use range-based for loops (NFC)Kazu Hirata
2021-11-15[MachineVerifier] Live interval for a subreg must have subrangesJay Foad
2021-10-18Add new MachineFunction property FailsVerificationJay Foad
2021-10-07[MachineInstr] Move MIParser's DBG_VALUE RegState::Debug invariant into Machi...Jack Andersen
2021-10-05[LiveIntervals] Fix verification of early-clobbered segmentsJay Foad
2021-10-01[LiveVariables] Skip verification of kills inside bundlesJay Foad
2021-09-02[ARM] Add a tail-predication loop predicate registerDavid Green
2021-09-02Revert @llvm.isnan intrinsic patchset.Roman Lebedev
2021-08-20[GlobalISel] Add G_LLROUNDJessica Paquette
2021-08-19[GlobalISel] Add a G_LROUND instructionJessica Paquette
2021-08-19[AArch64][GlobalISel] Add G_VECREDUCE fewerElements support for full scalariz...Amara Emerson
2021-08-18[GlobalISel] Add G_ISNANJessica Paquette
2021-08-13[NFC] Rename AttributeList::hasFnAttribute() -> hasFnAttr()Arthur Eubanks
2021-07-21[MachineVerifier] Make INSERT_SUBREG diagnostic respect operand 2 subregsJon Roelofs
2021-07-20[MachineVerifier] Diagnose invalid INSERT_SUBREGsJon Roelofs
2021-07-16Revert "[MachineVerifier] Diagnose invalid INSERT_SUBREGs"Jon Roelofs
2021-07-16[MachineVerifier] Diagnose invalid INSERT_SUBREGsJon Roelofs
2021-06-30[GISel] Support llvm.memcpy.inlineJon Roelofs
2021-04-28GlobalISel: Relax verification of physical register copy typesMatt Arsenault
2021-04-21[CSSPGO] Exclude pseudo probe from slotindex verification.Hongtao Yu
2021-04-20MachineVerifier: Continue reporting errors for copiesMatt Arsenault
2021-04-19[Greedy RA] Add a check to MachineVerifierSerguei Katkov
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