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path: root/llvm/lib/CodeGen/MachineScheduler.cpp
AgeCommit message (Expand)Author
2020-12-14Revert "[DDG] Data Dependence Graph - DOT printer"Bardia Mahjour
2020-12-14[DDG] Data Dependence Graph - DOT printerBardia Mahjour
2020-11-17[MachineScheduler] Inform pass infra of post-ra scheduler's dependenciesJon Roelofs
2020-11-02[Scheduling] Fall back to the fast cluster algorithm if the DAG is too complexQingShan Zhang
2020-10-28[NFC] Use Register in RegisterPressure APIsMircea Trofin
2020-10-05[CodeGen][MachineSched] Fixup function name typo. NFCJon Roelofs
2020-09-21Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit"Alexander Belyaev
2020-09-18[NFC][ScheduleDAG] Remove unused EntrySU SUnitFrancis Visoiu Mistrih
2020-08-26[Scheduling] Implement a new way to cluster loads/storesQingShan Zhang
2020-08-07[NFC] Add the stats for load/store clusterQingShan Zhang
2020-08-07[Scheduling] Create the missing dependency edges for store clusterQingShan Zhang
2020-08-03Fix typo: s/epomymous/eponymous/ NFCJon Roelofs
2020-07-27[Scheduling] Improve group algorithm for store clusterQingShan Zhang
2020-07-17[MachineScheduler] Fix the TopDepth/BotHeightReduce latency heuristicsJay Foad
2020-06-23[AMDGPU/MemOpsCluster] Compute `width` for `MIMG` instruction class.hsmahesha
2020-06-09[MachineScheduler] Update available queue on the first mop of a new cycleDavid Green
2020-06-01[AMDGPU/MemOpsCluster] Let mem ops clustering logic also consider number of c...hsmahesha
2020-05-26[AMDGPU/MemOpsCluster] Code clean-up around mem ops clustering logichsmahesha
2020-04-22Add a policy to enable computing SchedDFSResult.Mark Lacey
2020-02-18Add OffsetIsScalable to getMemOperandWithOffsetSander de Smalen
2020-01-29[MachineScheduler] Ignore artificial edges when forming store chainsJay Foad
2020-01-28Make llvm::StringRef to std::string conversions explicit.Benjamin Kramer
2020-01-24Correct NumLoads in clusteringStanislav Mekhanoshin
2020-01-22[MachineScheduler] Allow clustering mem ops with complex addressesJay Foad
2020-01-15[MachineScheduler][NFC] Don't swap when we can't clusterJinsong Ji
2020-01-14[MachineScheduler] Reduce reordering due to mem op clusteringJay Foad
2020-01-12[NFC] Refactor memory ops cluster methodQiu Chaofan
2020-01-08[NFC] Move InPQueue into arguments of releaseNodeQiu Chaofan
2020-01-02[NFC] Add explicit instantiation to releaseNodeQiu Chaofan
2020-01-01[MachineScheduler] improve reuse of 'releaseNode'methodLorenzo Casalino
2019-12-18[AArch64] Enable clustering memory accesses to fixed stack objectsJay Foad
2019-11-13Sink all InitializePasses.h includesReid Kleckner
2019-11-05[MachineScheduler] Enable AA in PostRA Machine schedulerDavid Green
2019-11-05[Scheduling][ARM] Consistently enable PostRA Machine schedulingDavid Green
2019-10-01[Dominators][CodeGen] Fix MachineDominatorTree preservation in PHIEliminationJakub Kuderski
2019-10-01[AMDGPU] Add VerifyScheduling support.Jay Foad
2019-09-14[ScheduleDAGMILive] Fix typo in comment.Mingjie Xing
2019-08-15Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders
2019-08-15[llvm] Migrate llvm::make_unique to std::make_uniqueJonas Devlieghere
2019-08-01Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders
2019-06-07[MachineScheduler] checkResourceLimit boundary condition updateJinsong Ji
2019-05-30MISched: Fix -misched-regpressure=0 if subreg liveness enabledMatt Arsenault
2019-05-10Adjust MachineScheduler to use ProcResource countsMomchil Velikov
2019-04-19[CodeGen] Add "const" to MachineInstr::mayAliasBjorn Pettersson
2019-04-19[PATCH] [MachineScheduler] Check pending instructions when an instruction is ...James Molloy
2019-03-29[ScheduleDAG] Move `Topo` and `addEdge` to base class.Clement Courbet
2019-03-25MISched: Don't schedule regions with 0 instructionsMatt Arsenault
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth
2019-01-09[NFC] fix trivial typos in commentsHiroshi Inoue
2018-11-29[MachineScheduler] Order FI-based memops based on stack directionFrancis Visoiu Mistrih
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