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path: root/llvm/lib/CodeGen/MachineRegisterInfo.cpp
AgeCommit message (Expand)Author
2025-10-03CodeGen: Stop checking for physregs in constrainRegClass (#161795)Matt Arsenault
2025-09-03[AMDGPU] si-peephole-sdwa: reuse getOne{NonDBGUse,Def} (NFC) (#156455)Frederik Harwath
2025-05-13Reapply "[AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during sched...Lucas Ramirez
2025-05-09Revert "[AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during schedu...Vitaly Buka
2025-05-08[AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during scheduling (#1...Lucas Ramirez
2025-01-23MachineRegisterInfo: Use variable for TRIMatt Arsenault
2025-01-19[CodeGen] Remove some implict conversions of MCRegister to unsigned by using(...Craig Topper
2025-01-18[CodeGen] Use Register/MCRegister::isPhysical. NFCCraig Topper
2025-01-02[CodeGen] Remove atEnd method from defusechain iterators (#120610)Jay Foad
2024-12-06[RISCV][MRI] Account for fixed registers when determining callee saved regs (...Michael Maitland
2024-08-07[CodeGen] Allocate RegAllocHints map lazily (#102186)Alexis Engelke
2024-06-14[CodeGen] Remove target SubRegLiveness flags (#95437)David Green
2024-03-11[CodeGen] Remove unused MachineRegisterInfo methodsJay Foad
2024-03-11[CodeGen] Do not pass MF into MachineRegisterInfo methods. NFC. (#84770)Jay Foad
2024-02-05AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis (#80003)Petar Avramovic
2024-01-24Revert "AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis" (#79274)Petar Avramovic
2024-01-24AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis (#78482)Petar Avramovic
2023-10-24[ADT] Rename llvm::erase_value to llvm::erase (NFC) (#70156)Kazu Hirata
2023-08-13[CodeGen] MachineRegisterInfo::constrainRegAttrs - add explicit auto referenc...Simon Pilgrim
2023-04-18[MC] Simplify uses of subregs/superregs. NFC.Jay Foad
2023-04-18[MC] Use subregs/superregs instead of MCSubRegIterator/MCSuperRegIterator. NFC.Jay Foad
2023-04-17[nfc][llvm] Replace pointer cast functions in PointerUnion by llvm casting fu...Shraiysh Vaishay
2023-01-13[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFCCraig Topper
2022-12-17[CodeGen] Use delegate to notify targets when virtual registers are createdChristudasan Devadasan
2022-12-15[MRI] Print more debug infor in clearVirtRegs() (NFC)Nikita Popov
2022-09-15[AMDGPU] Always select s_cselect_b32 for uniform 'select' SDNodeAlexander Timofeev
2022-07-27Use hasNItemsOrLess() in MRI::hasAtMostUserInstrs().Amara Emerson
2022-07-27[AArch64][GlobalISel] Add heuristics for localizing G_CONSTANT.Amara Emerson
2022-03-16Cleanup codegen includesserge-sans-paille
2022-03-10Revert "Cleanup codegen includes"Nico Weber
2022-03-10Cleanup codegen includesserge-sans-paille
2022-02-08[X86] Implement -fzero-call-used-regs optionBill Wendling
2022-01-30[CodeGen] Use default member initialization (NFC)Kazu Hirata
2021-10-31[CodeGen] Use make_early_inc_range (NFC)Kazu Hirata
2021-06-14[AIX][XCOFF] emit vector info of traceback table.zhijian
2021-03-05Reapply "[DebugInfo] Add new instruction and DIExpression operator for varia...Stephen Tozer
2021-03-04Revert "[DebugInfo] Add new instruction and DIExpression operator for variadi...Stephen Tozer
2021-03-04[DebugInfo] Add new instruction and DIExpression operator for variadic debug ...gbtozers
2021-02-20[CodeGen] Use range-based for loops (NFC)Kazu Hirata
2021-02-19[CodeGen] Use range-based for loops (NFC)Kazu Hirata
2021-01-21[CodeGen] Use llvm::append_range (NFC)Kazu Hirata
2021-01-20[llvm] Use hasSingleElement (NFC)Kazu Hirata
2021-01-07[CodeGen] Remove unused function isCallerPreservedOrConstPhysReg (NFC)Kazu Hirata
2020-12-13[CodeGen] Use llvm::erase_value (NFC)Kazu Hirata
2020-10-28[NFC] Use [MC]Register in CSE & LICMGaurav Jain
2020-06-22[DebugInfo] Update MachineInstr to help support variadic DBG_VALUE instructionsstozer
2020-04-07CodeGen: Use Register in more placesMatt Arsenault
2020-04-06Revert "[IPRA][ARM] Spill extra registers at -Oz"Oliver Stannard
2020-03-18[IPRA][ARM] Spill extra registers at -OzOliver Stannard
2020-01-30CodeGen: Use RegisterMatt Arsenault
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