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path: root/llvm/lib/CodeGen/MachineInstr.cpp
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2007-12-30simpilfy some register printing code.Chris Lattner
llvm-svn: 45458
2007-12-30eliminate a copy of the machineoperand printing stuff. Keep the copy thatChris Lattner
knows how to print offsets. llvm-svn: 45457
2007-12-30Simplify and clean up some machine operand/instr printing/dumping stuff.Chris Lattner
llvm-svn: 45456
2007-12-30two register machineoperands are not identical unless their subregs match.Chris Lattner
llvm-svn: 45455
2007-12-30MachineOperand::getImmedValue -> MachineOperand::getImmChris Lattner
llvm-svn: 45454
2007-12-30make machine operands fatter: give each one an up-pointer to the Chris Lattner
machineinstr that owns it. llvm-svn: 45449
2007-12-30Start using the simplified methods for adding operands.Chris Lattner
llvm-svn: 45432
2007-12-30simplify some code by factoring operand construction better.Chris Lattner
llvm-svn: 45428
2007-12-29Remove attribution from file headers, per discussion on llvmdev.Chris Lattner
llvm-svn: 45418
2007-11-14Clean up sub-register implementation by moving subReg information back toEvan Cheng
MachineOperand auxInfo. Previous clunky implementation uses an external map to track sub-register uses. That works because register allocator uses a new virtual register for each spilled use. With interval splitting (coming soon), we may have multiple uses of the same register some of which are of using different sub-registers from others. It's too fragile to constantly update the information. llvm-svn: 44104
2007-10-13Optionally create a MachineInstr without default implicit operands.Evan Cheng
llvm-svn: 42945
2007-10-12EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG likeEvan Cheng
(almost) a register copy. However, it always coalesced to the register of the RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub- register uses which adds subtle complications to load folding, spiller rewrite, etc. llvm-svn: 42899
2007-09-14Remove isReg, isImm, and isMBB, and change all their users to use Dan Gohman
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent, and more popular. llvm-svn: 41958
2007-09-14Remove spurious consts. This fixes warnings with compilers thatDan Gohman
are strict about such things. llvm-svn: 41956
2007-07-26Remove subreg index from MachineInstr's and also keep vregs as unsigned when ↵Christopher Lamb
adding operands. llvm-svn: 40514
2007-06-15MachineInstr::isPredicable() is no longer needed.Evan Cheng
llvm-svn: 37599
2007-05-29Add missing const qualifiers.Evan Cheng
llvm-svn: 37341
2007-05-16Rename M_PREDICATED to M_PREDICABLE; Moved isPredicable() to MachineInstr.Evan Cheng
llvm-svn: 37121
2007-05-15Added getNumExplicitOperands and findFirstPredOperand.Evan Cheng
llvm-svn: 37064
2007-05-01llvm bug #1350, parts 1, 2, and 3.Nate Begeman
llvm-svn: 36618
2007-04-26Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.Evan Cheng
llvm-svn: 36483
2007-03-26Change findRegisterUseOperand() to return operand index instead.Evan Cheng
llvm-svn: 35363
2007-02-23Use findRegisterUseOperand to find a kill of particular register.Evan Cheng
llvm-svn: 34512
2007-02-19Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.Evan Cheng
llvm-svn: 34428
2007-02-19For PR1207:Reid Spencer
Revert patches that caused the problem. Evan, please investigate and reapply when you've discovered the problem. llvm-svn: 34399
2007-02-17Added findRegisterDefOperand().Evan Cheng
llvm-svn: 34380
2007-02-16Print <dead> def operands.Evan Cheng
llvm-svn: 34343
2006-12-16The best unbreakage yet, addressing Bill's concerns.Jeff Cohen
llvm-svn: 32622
2006-12-15An even better unbreakage...Jeff Cohen
llvm-svn: 32617
2006-12-07Changed llvm_ostream et all to OStream. llvm_cerr, llvm_cout, llvm_null, areBill Wendling
now cerr, cout, and NullStream resp. llvm-svn: 32298
2006-12-06Move copyKillDeadInfo out-of-line. Add findRegisterUseOperand().Evan Cheng
llvm-svn: 32273
2006-11-30- MachineInstr now keeps a ptr to TargetInstrDescriptor instead of Opcode.Evan Cheng
- Remove the ugly TargetInstrDescriptors hack. llvm-svn: 32032
2006-11-28Use llvm streams instead of <iostream>Bill Wendling
llvm-svn: 31985
2006-11-28Clean up.Evan Cheng
llvm-svn: 31957
2006-11-27Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng
of opcode and number of operands. llvm-svn: 31947
2006-11-20setOperand should not zap the operand list or add implicit operands to anChris Lattner
instruction. Doing so breaks the FP stackifier, the alpha branch selector the sparc fpmover. This fixes PR1012 and CodeGen/X86/fp-stack-compare.ll llvm-svn: 31876
2006-11-15Minor updates.Evan Cheng
llvm-svn: 31761
2006-11-13- Let MachineInstr ctors add implicit def and use operands. Other operandsEvan Cheng
will be inserted before these operands. If the opcode changes (by setOpcode), the implicit operands are updated as well. - Added IsKill, IsDead fields to MachineOperand in preparation for changes that move kill / dead info to MachineInstr's. llvm-svn: 31711
2006-11-11Add methods to add implicit def use operands to a MI.Evan Cheng
llvm-svn: 31675
2006-11-10Add implicit def / use operands to MachineInstr.Evan Cheng
llvm-svn: 31633
2006-10-25be more aggressive about matching identical instructions.Chris Lattner
llvm-svn: 31179
2006-10-20implement MachineOperand::isIdenticalToChris Lattner
llvm-svn: 31088
2006-09-05Only call isUse/isDef on register operandsChris Lattner
llvm-svn: 30118
2006-06-15Instructions with variable operands (variable_ops) can have a number requiredEvan Cheng
operands. e.g. def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops), "call {*}$dst", [(X86call GR32:$dst)]>; TableGen should emit operand informations for the "required" operands. Added a target instruction info flag M_VARIABLE_OPS to indicate the target instruction may have more operands in addition to the minimum required operands. llvm-svn: 28791
2006-05-26Remove a bogus cast.Evan Cheng
llvm-svn: 28492
2006-05-04Final pass of minor cleanups for MachineInstrChris Lattner
llvm-svn: 28110
2006-05-04Remove redundancy and a level of indirection when creating machine operandsChris Lattner
llvm-svn: 28107
2006-05-04Remove and simplify some more machineinstr/machineoperand stuff.Chris Lattner
llvm-svn: 28105
2006-05-04Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling.Chris Lattner
llvm-svn: 28104
2006-05-04Move some methods out of MachineInstr into MachineOperandChris Lattner
llvm-svn: 28102
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