summaryrefslogtreecommitdiff
path: root/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
AgeCommit message (Expand)Author
2025-06-26[GlobalISel] Remove dead code. (NFC) (#145811)Pete Chou
2025-06-25[X86][GlobalISel] Enable SINCOS with libcall mapping (#142438)JaydeepChauhan14
2025-06-23PowerPC: Stop reporting memcpy as an alias of memmove on AIX (#143836)Matt Arsenault
2025-06-23CodeGen: Emit error if getRegisterByName fails (#145194)Matt Arsenault
2025-06-21[GlobalISel] Widen vector loads from aligned ptrs (#144309)David Green
2025-06-15[GlobalISel] Split Legalizer debug ouput into paragraphs. NFC (#143427)David Green
2025-06-05[GlobalISel] support lowering of G_SHUFFLEVECTOR with pointer args (#141959)Stanley Gambarin
2025-05-21AMDGPU/GlobalISel: Start legalizing minimumnum and maximumnum (#140900)Matt Arsenault
2025-05-13[GISel][AArch64] Added more efficient lowering of Bitreverse (#139233)jyli0116
2025-05-06[GlobalISel][AArch64] Handles bitreverse to prevent falling back (#138150)jyli0116
2025-05-05[CodeGen] Use range-based for loops (NFC) (#138488)Kazu Hirata
2025-05-04Revert "[CodeGen] Use range-based for loops (NFC) (#138434)"Nico Weber
2025-05-04[CodeGen] Remove unused local variables (NFC) (#138441)Kazu Hirata
2025-05-04[CodeGen] Use range-based for loops (NFC) (#138434)Kazu Hirata
2025-04-29[GlobalISel] Fix miscompile when narrowing vector loads/stores to non-byte-si...Tobias Stadler
2025-04-16[llvm] Use llvm::append_range (NFC) (#136066)Kazu Hirata
2025-04-13[CodeGen] Use llvm::append_range (NFC) (#135567)Kazu Hirata
2025-03-29[CodeGen] Use llvm::append_range (NFC) (#133603)Kazu Hirata
2025-03-29[GlobalISel][NFC] Rename GISelKnownBits to GISelValueTracking (#133466)Tim Gymnich
2025-03-22[llvm] Construct SmallVector with ArrayRef (NFC) (#132560)Kazu Hirata
2025-03-20[AArch64][GlobalISel] Legalize more CTPOP vector types. (#131513)David Green
2025-03-19[AArch64][GlobalISel] Clean up CTLZ vector type legalization. (#131514)David Green
2025-03-18[CodeGen][GlobalISel] Add a getVectorIdxWidth and getVectorIdxLLT. (#131526)David Green
2025-03-02[GlobalISel] Use Register. NFCCraig Topper
2025-02-20[GlobalISel][AArch64] Fix fptoi.sat lowering. (#127901)David Green
2025-02-20Revert "AMDGPU: Don't canonicalize fminnum/fmaxnum if targets support IEEE fm...Matt Arsenault
2025-02-19AMDGPU: Don't canonicalize fminnum/fmaxnum if targets support IEEE fminimum(m...Changpeng Fang
2025-02-03[X86][GlobalISel] Enable G_LROUND/G_LLROUND with libcall mapping (#125096)JaydeepChauhan14
2025-02-02[AArch64][GlobalISel] Add disjoint handling for add_and_or_is_add. (#123594)David Green
2025-01-30[AArch64][GlobalISel] Legalize more G_VECREDUCE_ADD operations. (#123392)David Green
2025-01-06[AArch64][GlobalISel] Fix legalization for <4 x i1> vector stores.Amara Emerson
2025-01-06[AArch64][GlobalISel] Add support for lowering trunc stores of vector bools.Amara Emerson
2025-01-05[AArch64][GlobalISel] Legalize vector boolean bitcasts to scalars by lowering...Amara Emerson
2025-01-05[AArch64][GlobalISel] Add support for widening vector store elements to s8.Amara Emerson
2024-12-15[GISel][RISCV] Use isSExtCheaperThanZExt when widening G_UMAX/G_UMIN. (#120041)Craig Topper
2024-12-15[GISel][RISCV] Use isSExtCheaperThanZExt when widening G_ICMP. (#120032)Craig Topper
2024-12-15[GISel][RISCV][AArch64] Support legalizing G_SCMP/G_UCMP to sub(isgt,islt). (...Craig Topper
2024-12-15[AArch64][GlobalISel] Scalarize i128 shufflevector instructions. (#119980)David Green
2024-12-12[GISel] Support narrowing G_ICMP with more than 2 parts. (#119335)Craig Topper
2024-12-12[GlobalISel][NFC] Fix LLT Propagation (#119587)Tim Gymnich
2024-12-10[GISel][SDAG] Avoid push_back in loops for some shuffle mask handling. (#119434)Craig Topper
2024-12-10[GISel] Use SmallVector::append instead of copying one element at a time. (#1...Craig Topper
2024-12-09[GISel] Avoid creating a virtual register we don't need. (#119305)Craig Topper
2024-12-04[RISCV][GISel] Stop over promoting G_SITOFP/UITOFP libcalls on RV64. (#118597)Craig Topper
2024-12-02[RISCV][GISel] Support f32/f64 ldexp. (#117941)Craig Topper
2024-12-02[RISCV][GISel] Support f32/f64 powi. (#117937)Craig Topper
2024-11-26[RISCV][GISel] Use libcalls for f32/f64 G_FCMP without F/D extensions. (#117660)Craig Topper
2024-11-25[GISel] #undef macros when they are no longer needed. NFC (#117652)Craig Topper
2024-11-23[AArch64][GlobalISel] Legalize ptr shuffle vector to s64 (#116013)David Green
2024-10-24[aarch64] atan2 intrinsic lowering (p5) (#112611)Tex Riddell
generated by cgit v1.2.3 (git 2.25.1) at 2026-10-25 00:04:31 +0000