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path: root/llvm/lib/CodeGen/DetectDeadLanes.cpp
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2025-03-12[CodeGen][NPM] Port DetectDeadLanes to NPM (#130567)Akshat Oke
2025-03-06[CodeGen] Use Register or MCRegister. NFCCraig Topper
2025-02-19[CodeGen] Remove static member function Register::virtReg2Index. NFC (#127962)Craig Topper
Use the nonstatic member instead. I'm pretty sure the code in SPRIV is a layering violation. MC layer files are using a CodeGen header.
2025-01-30[CodeGen] Use non-static Register::virtRegIndex() instead of static ↵Craig Topper
Register::virtReg2Index. NFC (#125031) These are the the ones where we already had a Register object being used. Some places are still using unsigned which I did not convert.
2023-04-17Fix uninitialized pointer members in CodeGenAkshay Khadse
This change initializes the members TSI, LI, DT, PSI, and ORE pointer feilds of the SelectOptimize class to nullptr. Reviewed By: LuoYuanke Differential Revision: https://reviews.llvm.org/D148303
2023-02-07[CodeGen] Define and use MachineOperand::getOperandNoJay Foad
This is a helper function to very slightly simplify many calls to MachineInstruction::getOperandNo. Differential Revision: https://reviews.llvm.org/D143250
2023-01-25[CodeGen] Split some functionality from DetectDeadLanes into its own class ↵Craig Topper
to be reused. NFC This is an alternative to D140382. This moves the first part of runOnce into a new class that can be reused by D129735. This encapsulates the ownership of the worklist, and VRegInfos into the new class. The code for updating the dead lanes stays in the DetectDeadLanes class. The new class is created on the stack during runOnMachineFunction so all the data structures will be deleted after each run. Previously we only cleared them after each run so the memory might have stayed allocated across runs. Except for VRegInfo which was always deleted. Hopefully this allocation change isn't a big deal. Reviewed By: BeMg Differential Revision: https://reviews.llvm.org/D141993
2023-01-13[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFCCraig Topper
Use isPhysical/isVirtual methods. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D141715
2022-12-07[NFC] Use Register instead of unsigned for variables that receive a Register ↵Gregory Alfonso
object Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D139451
2022-03-16Cleanup codegen includesserge-sans-paille
This is a (fixed) recommit of https://reviews.llvm.org/D121169 after: 1061034926 before: 1063332844 Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup Differential Revision: https://reviews.llvm.org/D121681
2022-03-10Revert "Cleanup codegen includes"Nico Weber
This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20. Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang, and many LLVM tests, see comments on https://reviews.llvm.org/D121169
2022-03-10Cleanup codegen includesserge-sans-paille
after: 1061034926 before: 1063332844 Differential Revision: https://reviews.llvm.org/D121169
2022-02-17[CodeGen] Return better Changed status from DetectDeadLanesJay Foad
Differential Revision: https://reviews.llvm.org/D119940
2021-07-27[NFC] Reflow some debug messages.David Green
2020-11-25DetectDeadLanes.cpp - remove unused headers. NFCI.Simon Pilgrim
2019-08-15Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders
Summary: This clang-tidy check is looking for unsigned integer variables whose initializer starts with an implicit cast from llvm::Register and changes the type of the variable to llvm::Register (dropping the llvm:: where possible). Partial reverts in: X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister X86FixupLEAs.cpp - Some functions return unsigned and arguably should be MCRegister X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister HexagonBitSimplify.cpp - Function takes BitTracker::RegisterRef which appears to be unsigned& MachineVerifier.cpp - Ambiguous operator==() given MCRegister and const Register PPCFastISel.cpp - No Register::operator-=() PeepholeOptimizer.cpp - TargetInstrInfo::optimizeLoadInstr() takes an unsigned& MachineTraceMetrics.cpp - MachineTraceMetrics lacks a suitable constructor Manual fixups in: ARMFastISel.cpp - ARMEmitLoad() now takes a Register& instead of unsigned& HexagonSplitDouble.cpp - Ternary operator was ambiguous between unsigned/Register HexagonConstExtenders.cpp - Has a local class named Register, used llvm::Register instead of Register. PPCFastISel.cpp - PPCEmitLoad() now takes a Register& instead of unsigned& Depends on D65919 Reviewers: arsenm, bogner, craig.topper, RKSimon Reviewed By: arsenm Subscribers: RKSimon, craig.topper, lenary, aemerson, wuzish, jholewinski, MatzeB, qcolombet, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, wdng, nhaehnle, sbc100, jgravelle-google, kristof.beyls, hiraditya, aheejin, kbarton, fedor.sergeev, javed.absar, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, tpr, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, Jim, s.egerton, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65962 llvm-svn: 369041
2019-08-01Finish moving TargetRegisterInfo::isVirtualRegister() and friends to ↵Daniel Sanders
llvm::Register as started by r367614. NFC llvm-svn: 367633
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth
to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
2018-05-14Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen
The DEBUG() macro is very generic so it might clash with other projects. The renaming was done as follows: - git grep -l 'DEBUG' | xargs sed -i 's/\bDEBUG\s\?(/LLVM_DEBUG(/g' - git diff -U0 master | ../clang/tools/clang-format/clang-format-diff.py -i -p1 -style LLVM - Manual change to APInt - Manually chage DOCS as regex doesn't match it. In the transition period the DEBUG() macro is still present and aliased to the LLVM_DEBUG() one. Differential Revision: https://reviews.llvm.org/D43624 llvm-svn: 332240
2017-12-13Remove redundant includes from lib/CodeGen.Michael Zolotukhin
llvm-svn: 320619
2017-11-30[CodeGen] Print "%vreg0" as "%0" in both MIR and debug outputFrancis Visoiu Mistrih
As part of the unification of the debug format and the MIR format, avoid printing "vreg" for virtual registers (which is one of the current MIR possibilities). Basically: * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E "s/%vreg([0-9]+)/%\1/g" * grep -nr '%vreg' . and fix if needed * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E "s/ vreg([0-9]+)/ %\1/g" * grep -nr 'vreg[0-9]\+' . and fix if needed Differential Revision: https://reviews.llvm.org/D40420 llvm-svn: 319427
2017-11-28[CodeGen] Rename functions PrintReg* to printReg*Francis Visoiu Mistrih
LLVM Coding Standards: Function names should be verb phrases (as they represent actions), and command-like function should be imperative. The name should be camel case, and start with a lower case letter (e.g. openFile() or isFoo()). Differential Revision: https://reviews.llvm.org/D40416 llvm-svn: 319168
2017-11-17Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie
All these headers already depend on CodeGen headers so moving them into CodeGen fixes the layering (since CodeGen depends on Target, not the other way around). llvm-svn: 318490
2017-11-08Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie
This header includes CodeGen headers, and is not, itself, included by any Target headers, so move it into CodeGen to match the layering of its implementation. llvm-svn: 317647
2017-05-25CodeGen: Rename DEBUG_TYPE to match passnamesMatthias Braun
Rename the DEBUG_TYPE to match the names of corresponding passes where it makes sense. Also establish the pattern of simply referencing DEBUG_TYPE instead of repeating the passname where possible. llvm-svn: 303921
2017-03-30Spelling mistakes in comments. NFCI.Simon Pilgrim
Based on corrections mentioned in patch for clang for PR27635 llvm-svn: 299072
2016-12-16Implement LaneBitmask::any(), use it to replace !none(), NFCIKrzysztof Parzyszek
llvm-svn: 289974
2016-12-15Extract LaneBitmask into a separate typeKrzysztof Parzyszek
Specifically avoid implicit conversions from/to integral types to avoid potential errors when changing the underlying type. For example, a typical initialization of a "full" mask was "LaneMask = ~0u", which would result in a value of 0x00000000FFFFFFFF if the type was extended to uint64_t. Differential Revision: https://reviews.llvm.org/D27454 llvm-svn: 289820
2016-10-01Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini
llvm-svn: 283004
2016-08-24MachineRegisterInfo/MIR: Initialize tracksSubRegLiveness early, do not ↵Matthias Braun
print/parser it tracksSubRegLiveness only depends on the Subtarget and a cl::opt, there is not need to change it or save/parse it in a .mir file. Make the field const and move the initialization LiveIntervalAnalysis to the MachineRegisterInfo constructor. Also cleanup some code and fix some instances which better use MachineRegisterInfo::subRegLivenessEnabled() instead of TargetSubtargetInfo::enableSubRegLiveness(). llvm-svn: 279676
2016-06-15Make DetectDeadLanes preserve CFGMatt Arsenault
llvm-svn: 272740
2016-05-06DetectDeadLanes: Increase precision when detecting undef inputsMatthias Braun
In case of COPY-like instruction we may be able to deduce that a certain input is unused, based on the used lanes of the register defined by the instruction. This even works accross otherwise incompatible copies (no need to have compatible lanemasks, completely unused operands are still completely unused). It even makes sense to redo the analysis in this case since we gained information for a case we previously stopped at because of the incompatible masks. llvm-svn: 268815
2016-05-06DetectDeadLanes: Cleanup, assert on some impossible cases.Matthias Braun
llvm-svn: 268814
2016-04-28[CodeGen] Remove extra ';'Marcin Koscielnicki
Squashes a -Wpedantic warning. llvm-svn: 267944
2016-04-28CodeGen: Add DetectDeadLanes pass.Matthias Braun
The DetectDeadLanes pass performs a dataflow analysis of used/defined subregister lanes across COPY instructions and instructions that will get lowered to copies. It detects dead definitions and uses reading undefined values which are obscured by COPY and subregister usage. These dead definitions cause trouble in the register coalescer which cannot deal with definitions suddenly becoming dead after coalescing COPY instructions. For now the pass only adds dead and undef flags to machine operands. It should be possible to extend it in the future to remove the dead instructions and redo the analysis for the affected virtual registers. Differential Revision: http://reviews.llvm.org/D18427 llvm-svn: 267851
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