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2025-01-22clang-formatusers/tmatheson-arm/multiple_output_patternsTomas Matheson
2025-01-21fixup merge conflict resolution errorsTomas Matheson
2025-01-21Implement multiple output patternsTomas Matheson
2025-01-21Add TreePattern::hasProperTypeByHwModeTomas Matheson
2025-01-21Add TreePattern constructor that takes multiple patternsTomas Matheson
2025-01-21make getInstructionsInTree constusers/tmatheson-arm/multiple_output_patterns_precursorTomas Matheson
2025-01-21[NFC] replace GetPatFromTreePatternNode with llvm::to_stringTomas Matheson
2025-01-21[mlir][spirv] Add GpuToLLVM cconv suited to Vulkan, migrate last tests (#123384)Andrea Faulds
2025-01-21[X86][AVX10.2-MINMAX][NFC] Remove NE[P] from intrinsic and instruction (#123272)Phoebe Wang
2025-01-21[AArch64] Generate zeroing forms of certain SVE2.2 instructions (5/11) (#116831)Momchil Velikov
2025-01-21[SPIR-V] Add SPIRV to LLVM_ALL_TARGETS (reapply) (#123733)Michal Paszkowski
2025-01-21[SPIR-V] Ensure that Module resource is managed locally wrt. a unit test case...Vyacheslav Levytskyy
2025-01-21[Clang] Add numeric for iota.David Green
2025-01-21[DAGCombiner] Fix scalarizeExtractedBinOp for some SETCC cases (#123071)David Sherwood
2025-01-21[AArch64] FEAT_SPEv1p2 is optional in v8.7-A and v9.2-A (#123336)Oliver Stannard
2025-01-21[libclc] Route int bitselect through CLC; add half (#123653)Fraser Cormack
2025-01-21[libclc] Route select through __clc_select (#123647)Fraser Cormack
2025-01-21[AMDGPU][CodeGen] SILowerWWMCopies: Declare used analyses (#123710)Akshat Oke
2025-01-21[NVPTX] Add support for PTX 8.6 and CUDA 12.6 (12.8) (#123398)Sergey Kozub
2025-01-21[AMDGPU][NewPM] Port SIFixVGPRCopies to NPM (#123592)Akshat Oke
2025-01-21[Reassociate] Don't reassociate vXi1 logical expressions (#123329)Simon Pilgrim
2025-01-21[LLD][COFF] Separate EC and native exports for ARM64X (#123652)Jacek Caban
2025-01-21[AMDGPU] Update entry point name for PAL metadata (#123581)David Stuttard
2025-01-21[mlir] computeSliceParameters: Fix offset when m(0) != 0 (#122492)Matthias Gehre
2025-01-21"Reland "[Wunsafe-buffer-usage] Fix false positive when const sized array is ...Malavika Samak
2025-01-21[lldb][Linux] Add Control Protection Fault signal (#122917)David Spickett
2025-01-21[AArch64] Improve bcvtn2 and remove aarch64_neon_bfcvt intrinsics (#120363)David Green
2025-01-21[AArch64] Eliminate Common SUBS by Reassociating Non-Constants (#123344)Marius Kamp
2025-01-21[clang][Sema] Respect qualification of methods in heuristic results (#123551)Nathan Ridge
2025-01-21[IR][unittests] Replace of PointerType::get(Type) with opaque version (NFC) (...Mats Jun Larsen
2025-01-21[MLIR][NVVM] Add TMA Bulk Copy Ops (#123186)Durgadoss R
2025-01-21[SelectionDAG] Avoid repeated hash lookups (NFC) (#123697)Kazu Hirata
2025-01-21[Rewrite] Avoid repeated hash lookups (NFC) (#123696)Kazu Hirata
2025-01-21[TableGen] Avoid repeated map lookups (NFC) (#123699)Kazu Hirata
2025-01-21[MC] Avoid repeated hash lookups (NFC) (#123698)Kazu Hirata
2025-01-21[Mips] Handle declspec(dllimport) on mipsel-windows-* triples (#120912)Hervé Poussineau
2025-01-21[CodeGen] Use MCRegister for ignoreCSRForAllocationOrder. (#123685)Craig Topper
2025-01-21Reland "[Flang][Driver] Add a flag to control zero initialization" (#123606)Kiran Chandramohan
2025-01-21[MIPS][MSA] Invert operand order of `ILVOD` when lowering `VECTOR_SHUFFLE` (#...Cinhi Young
2025-01-21[mlir][IR][NFC] Move free-standing functions to `MemRefType` (#123465)Matthias Springer
2025-01-21[ORC-RT][LoongArch] Add initial support for loongarch64 in ELFNixPlatform (#1...Ami-zhang
2025-01-21[Clang] Delegate part of SetupConstraintScope's job to LambdaScopeForCallOper...Younan Zhang
2025-01-21[ReachingDefAnalysis][NFC] Replace MCRegister with Register (#123626)Mikhail Gudim
2025-01-21[LoopInterchange] Constrain number of load/stores in a loop (#118973)Madhur Amilkanthwar
2025-01-20[OpenMP][Flang] Workaround omp_lib error (#123666)Jan Patrick Lehr
2025-01-20[OpenMP] Make each atomic helper take an atomic scope argument (#122786)Joseph Huber
2025-01-20[OpenMP] Adjust 'printf' handling in the OpenMP runtime (#123670)Joseph Huber
2025-01-21AMDGPU: Fix asm constrains in new shuffle testsMatt Arsenault
2025-01-21[Flang] Add LLVM lowering support for UNTIED clause in Task (#121052)Thirumalai Shaktivel
2025-01-20[ARM] Use MCRegister instead of unsigned. NFCCraig Topper
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