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2025-02-26fixup! Manually fixed testsusers/guy-david/machine-sinkGuy David
2025-02-26fixup! Automatically updated testsGuy David
2025-02-26[MachineSink] Lower SplitEdgeProbabilityThresholdGuy David
2025-02-26[PowerPC] Do not rely on MachineSink threshold to optimize CR spillingusers/guy-david/machine-sink-powerpcGuy David
2025-02-27AMDGPU: Fix si-fix-sgpr-copies asserting on VReg_1 phi (#128903)Matt Arsenault
2025-02-26[libc][hdrgen] Allow to treat hdrgen Python code as a Python module. (#128955)Alexey Samsonov
2025-02-26[libc][bazel] Add targets for strfrom<float> (#128956)Michael Jones
2025-02-26[memprof] std::move matchings (NFC) (#128933)Kazu Hirata
2025-02-26[compiler-rt][rtsan] truncate/ftruncate interception. (#128904)David CARLIER
2025-02-26[gn build] Port 8fb88f568011LLVM GN Syncbot
2025-02-26[RISCV] Adding missing P600 sched model test for RVV segmented loads/storesMin-Yih Hsu
2025-02-26Revert "[AMDGPU] Handle memcpy()-like ops in LowerBufferFatPointers (#126621)"Kazu Hirata
2025-02-26[MLIR][LLVMIR] Import unregistered intrinsics via llvm.intrinsic_call (#128626)Bruno Cardoso Lopes
2025-02-26[clang][modules] Separate parsing of modulemaps (#119740)Michael Spencer
2025-02-26[SLP]Check if the operand for removal is the reduction operand, awaiting for ...Alexey Bataev
2025-02-26Revert "DAG: Preserve range metadata when load is narrowed" (#128948)Daniel Thornburgh
2025-02-26[WebAssemblyLowerEmscriptenEHSjLj] Avoid setting import_name where possible (...Sam Clegg
2025-02-26[AMDGPU] Handle memcpy()-like ops in LowerBufferFatPointers (#126621)Krzysztof Drewniak
2025-02-26[mlir][AMDGPU] Plumb address space 7 through MLIR, add address_space attr. (#...Krzysztof Drewniak
2025-02-26[MLIR][Vector]: Generalize conversion of `vector.insert` to LLVM in line with...Benoit Jacob
2025-02-26[flang][cuda] Add more math intrinsic interfaces in cudadevice (#128931)Valentin Clement (バレンタイン クレメン)
2025-02-26[SLP]Do not use node, if it is a subvector or buildvector nodeAlexey Bataev
2025-02-26[clang modules] Setting `DebugCompilationDir` when it is safe to ignore curre...Qiongsi Wu
2025-02-26[AMDGPU][True16][CodeGen] 16bit spill support in true16 mode (#128060)Brox Chen
2025-02-26[LV] Remove stray check lines after be28365ca78.Florian Hahn
2025-02-26[libc][bazel] Add targets for stdbit functions (#128934)Michael Jones
2025-02-26[mlir][tosa] Rename ReduceProd to ReduceProduct (#128751)Tai Ly
2025-02-26[mlir][tosa] Change zero points of convolution ops to required inputs (#127679)Tai Ly
2025-02-26[LV] Generate check lines for if-conversion.llFlorian Hahn
2025-02-26[libcxx] Add LWG4135: The helper lambda of std::erase for list should specify...elhewaty
2025-02-26[lldb-dap] Use existing lldb::IOObjectSP for DAP IO (NFC). (#128750)John Harrison
2025-02-26[gn build] Port 8dd8e5f7d692 (BuiltinTemplates.td)Nico Weber
2025-02-26[ctxprof] don't inline weak symbols after instrumentation (#128811)Mircea Trofin
2025-02-26[mlir][TosaToLinalg] Fix TosaToLinalg to restrict `tosa.cast` types to intege...Longsheng Mou
2025-02-26[Bazel] Port 128541 (#128809)Mircea Trofin
2025-02-26Fix the schedule of vectorizer improvement monthly syncAdityaK
2025-02-26[Telemetry] Fix a warningKazu Hirata
2025-02-26[TableGen] Update comment for size of NumToSkip field in DecoderEmitter. NFCCraig Topper
2025-02-26[llvm][telemetry]Change Telemetry-disabling mechanism. (#128534)Vy Nguyen
2025-02-26[lldb-dap] Avoid a std::string allocation for the help output (NFC)Jonas Devlieghere
2025-02-26[DirectX] Support the CBufferLoadLegacy operation (#128699)Justin Bogner
2025-02-26[RISCV][Docs] RISCV -> RISC-V in RISCVUsage.rst. NFC (#128906)Craig Topper
2025-02-26[flang][Semantics] Ensure deterministic mod file output (#128655)Iñaki Amatria Barral
2025-02-26[libc++] Optimize ranges::equal for vector<bool>::iterator (#121084)Peng Liu
2025-02-26[LLD][ELF] Generically report "address assignment did not converge" (#128774)Daniel Thornburgh
2025-02-26[MLIR][OPENMP] Relax requirement about branches as terminator of private allo...Kiran Chandramohan
2025-02-26[RISCV] Update MicroOpBufferSize in P400 & P600 scheduling models (#128786)Min-Yih Hsu
2025-02-26[libc++][test] Refactor tests for rotate and rotate_copy (#126458)Peng Liu
2025-02-26[RISCV][MC] Add assembler support for XRivosVisni (#128773)Philip Reames
2025-02-26[AMDGPU][True16][CodeGen] fix test for true16 codegen valu op (#128905)Brox Chen
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