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2025-11-11DAG: Handle load in SimplifyDemandedVectorEltsusers/arsenm/dag/simplify-demanded-vector-elts-loadMatt Arsenault
2025-11-11[AMDGPU][GISel] Add RegBankLegalize support for G_AMDGPU_WAVE_ADDRESS (#167456)Chinmay Deshpande
2025-11-12Fix lldb-dap non-leaf frame source resolution issue (#165944)jeffreytan81
2025-11-12[gn build] Port 5c3323a59fd2LLVM GN Syncbot
2025-11-11AMDGPU: Remove override of TargetInstrInfo::getRegClass (#159886)Matt Arsenault
2025-11-11[MachO] Fix test failure. (#167598)Prabhu Rajasekaran
2025-11-11[MLIR][Python] Add wrappers for scf.index_switch (#167458)Asher Mancinelli
2025-11-12[JITLINK] Fix large offset issue (#167600)anoopkg6
2025-11-12[mlir][tensor] Fix runtime verification for tensor.extract_slice for empty te...Hanumanth
2025-11-12[mlir][memref] Fix runtime verification for memref.subview for empty memref s...Hanumanth
2025-11-11AMDGPU: Remove wrapper around TRI::getRegClass (#159885)Matt Arsenault
2025-11-11AMDGPU: Update register class numbers in test (#167601)Matt Arsenault
2025-11-11AMDGPU: Start using RegClassByHwMode for wavesize operandsMatt Arsenault
2025-11-11workflows/libclang-abi-tests: Use new container (#167459)Tom Stellard
2025-11-11[VPlan] Add tests for hoisting predicated loads.Florian Hahn
2025-11-11AArch64: Use TargetConstant for intrinsic IDs (#166661)Matt Arsenault
2025-11-11[compiler-rt][asan] Fix a test on Windows (#167591)Alan Zhao
2025-11-11[lld][macho] Fix segfault while processing malformed object file. (#167025)Prabhu Rajasekaran
2025-11-11[MachO] Report error when there are too many sections (#167418)Prabhu Rajasekaran
2025-11-11AMDGPU: Regenerate test checks after bbde79278 (#167590)Matt Arsenault
2025-11-12[CodeGen] Use MCRegUnit in more places (NFC) (#167578)Sergei Barannikov
2025-11-11[VPlan] Remove unneeded getDefiningRecipe with isa/cast/dyn_cast. (NFC)Florian Hahn
2025-11-11[SPIRV] Use MCRegister instead of unsigned. NFC (#167585)Craig Topper
2025-11-11[libc++] Remove <stdbool.h> (#164595)Nikolas Klauser
2025-11-11AMDGPU: Relax shouldCoalesce to allow more register tuple widening (#166475)Matt Arsenault
2025-11-11PPC: Disable type checking in xfailed sincospi test (#167563)Matt Arsenault
2025-11-11AArch64: align pair-wise spills on WoS to 16-byte (#166902)Saleem Abdulrasool
2025-11-11[NFCI][lldb][test] Avoid GNU extension for specifying mangling (#167221)Raul Tambre
2025-11-11[VPlan] Add getSingleUser helper (NFC).Florian Hahn
2025-11-11[Github] Allow Premerge to use issue-write workflowAiden Grossman
2025-11-12[WebAssembly][FastISel] Bail out on meeting non-integer type in selectTrunc (...Hongyu Chen
2025-11-11[lldb] Introduce ScriptedFrameProvider for real threads (#161870)Med Ismail Bennani
2025-11-11[SLP]Be careful when trying match/vectorize copyable nodes with external uses...Alexey Bataev
2025-11-11[Github] Make Bazel Build/Test use GCS Cache (#167044)Aiden Grossman
2025-11-11[HLSL] Wrap offset info into a dedicated type. NFC (#167396)Justin Bogner
2025-11-11[Hexagon] Remove implicit conversions of MCRegister to unsigned. NFC (#167571)Craig Topper
2025-11-11[clang][OpenMP] 6.0: Add default clause support for 'target' directive (#162910)David Pagan
2025-11-11[BOLT] Move call probe information to CallSiteInfoAmir Ayupov
2025-11-11[IR] "modular-format" attribute for functions using format strings (#147429)Daniel Thornburgh
2025-11-11[CAS] Fix AIX build (#159647)Steven Wu
2025-11-11[libc] Use a sensible default when TEST_UNDECLARED_OUTPUTS_DIR is unset. (#16...Sterling-Augustine
2025-11-11[gn build] Port 82180558fea9LLVM GN Syncbot
2025-11-11[gn build] Port 17ce48f2b687LLVM GN Syncbot
2025-11-11[clang][test] Fix test issue under LLVM_REVERSE_ITERATION (#167394)Paul Kirth
2025-11-11[AVR] Remove implicit conversions of MCRegister to unsigned. NFC (#167566)Craig Topper
2025-11-11[llvm][asmprinter] Make call graph section deterministic (#167400)Paul Kirth
2025-11-11[AArch64] Use MCRegister instead of unsigned. NFC (#167547)Craig Topper
2025-11-11[ARM][BPF][Lanai][MSP430] Use MCRegister::id() to avoid an implicit cast. NFC...Craig Topper
2025-11-11[AMDGPU] Add pattern to select scalar ops for fshr with uniform operands (#16...Akash Dutta
2025-11-11[CHR] Make Selects Created in MergedCondition have Unknown Profdata (#167534)Aiden Grossman
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