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AgeCommit message (Expand)Author
2025-11-18[AArch64][SME] Support saving/restoring ZT0 in the MachineSMEABIPassusers/MacDue/mirzt0_3Benjamin Maxwell
2025-11-18[AArch64][SME] Handle zeroing ZA and ZT0 in functions with ZT0 stateBenjamin Maxwell
2025-11-18[CGP]: Optimize mul.overflow. (#148343)Hassnaa Hamdi
2025-11-18[X86] combineTruncate - trunc(srl(load(p),amt)) -> load(p+amt/8) - ensure amt...Simon Pilgrim
2025-11-18[ORC] Fix shlibs build: add Object to libLLVMOrcDebugging (#168343)Stefan Gränitz
2025-11-18[TableGen][NFCI] Change TableGenMain() to take function_ref. (#167888)Ivan Kosarev
2025-11-18[CMake] Declare all parts of *GenRegisterInfo.inc as outputs. (#168405)Ivan Kosarev
2025-11-18[Clang] Fix cleanup attribute by delaying type checks after the type is deduc...Guillot Tony
2025-11-18[LLVM][CodeGen][SVE] Use DUPM for constantfp splats. (#168391)Paul Walker
2025-11-18[AArch64][GlobalISel] Add better basic legalization for llround. (#168427)David Green
2025-11-18[MLIR][NVVM] Move the docs to markdown file (#168375)Guray Ozen
2025-11-18[LLVM][AArch64] Mark SVE integer intrinsics as speculatable. (#167915)Paul Walker
2025-11-18[MLIR][SPIRV] Lower SPIR-V Tan/Tanh ops to LLVM intrinsics (#168419)Hank
2025-11-18[VPlan] Support isa/dyn_cast from VPRecipeBase to VPIRMetadata (NFC). (#166245)Florian Hahn
2025-11-18[compiler-rt][ARM] Optimized mulsf3 and divsf3 (#168394)Simon Tatham
2025-11-18Extend MemoryEffects to Support Target-Specific Memory Locations (#148650)CarolineConcatto
2025-11-18[MLIR][NVVM] Add tcgen05.mma MLIR Ops (#164356)Pradeep Kumar
2025-11-18[AArch64][llvm] GICv5 instruction `GIC CDEOI` takes no operand (#167322)Jonathan Thackray
2025-11-18[gn build] Port 3ce893f83450LLVM GN Syncbot
2025-11-18[gn build] PortLLVM GN Syncbot
2025-11-18[X86][GlobalISel] Enable nest arguments (#165173)Evgenii Kudriashov
2025-11-18[ORC] Move DebugObjectManagerPlugin into Debugging/ELFDebugObjectPlugin (NFC)...Stefan Gränitz
2025-11-18[WebAssembly] Add patterns for extadd pairwise (#167960)Jasmine Tang
2025-11-18[Headers][X86] Allow AVX512 masked arithmetic pd/ps/epi/epu intrinsics to be ...woruyu
2025-11-18[Headers][X86] Allow AVX512 masked arithmetic ss/sd intrinsics to be used in ...woruyu
2025-11-18[mlir][bufferization] Refine tensor-buffer compatibility checks (#167705)Andrei Golubev
2025-11-18[MC] AsmLexer assert buffer is null-terminated at CurBuf.end() (#154972)Szymon Piotr Milczek
2025-11-18[lldb][nfc] Fix incorrect union usage in UnwindAssemblyInstEmulation (#168341)Felipe de Azevedo Piovezan
2025-11-18[DAGCombiner] Fold select into partial.reduce.add operands. (#167857)Sander de Smalen
2025-11-18[VPlan] Hoist loads with invariant addresses using noalias metadata. (#166247)Florian Hahn
2025-11-18[AArch64][SME] Add support for zeroing ZT0 to CommitZASavePseudo (#166360)Benjamin Maxwell
2025-11-18Fixed 2 tests that failed on MacOS (#168482)Katya Romanova
2025-11-18[AMDGPU][SIMemoryLegalizer] Combine GFX10-11 CacheControl Classes (#168058)Pierre van Houtryve
2025-11-18[AMDGPU][clang] Fix clang driver check for multiple sanitizer arguments (#166...Robert Imschweiler
2025-11-18Improve error response message parsing for DAP evaluate requests. (#168430)John Harrison
2025-11-18[SLP] Invariant loads cannot have a memory dependency on stores. (#167929)Michael Bedy
2025-11-18[mlir][SCF] Add pass option to deactivate pattern rollback (#168481)Matthias Springer
2025-11-18[RISCV] Add an option to enable CFIInstrInserter. (#164477)Mikhail Gudim
2025-11-18[ORC] Remove unnecessary LLVM_ABI on function def. NFCI. (#168478)Lang Hames
2025-11-18[clang][bytecode] Fix fallthrough to switch labels (#168484)Timm Baeder
2025-11-18[CIR] X86 vector fcmp-sse vector builtins (#167125)woruyu
2025-11-18[RISCV] Reduce minimum VL needed for vslidedown.vx in RISCVVLOptimizer (#168392)Luke Lau
2025-11-18[RISCV] Remove unused argument check (NFC) (#168313)Garth Lei
2025-11-18[mlir][NVVM] Add no-rollback option to NVVM lowering passes (#168477)Matthias Springer
2025-11-18[clang][NVPTX] Fix SM requirement of f32-tf32 rna satfinite conversion (#167836)Srinivasa Ravi
2025-11-17InstCombine: Stop transforming EQ/NE of SHR to 0 to ULT/UGT if >1 usePeter Collingbourne
2025-11-18[libc++][span] Mark functions as `[[nodiscard]]` (#168033)Hristo Hristov
2025-11-17[RISCV] Remove Match_InvalidXSfmmVType. NFC (#168465)Craig Topper
2025-11-17[ORC] Make tests work with Internal Shell (#168471)Aiden Grossman
2025-11-18[ORC] Support scanning "fallback" slices for interfaces. (#168472)Lang Hames