diff options
Diffstat (limited to 'llvm/test/TableGen/FixedLenDecoderEmitter/sub-arg-dag-error-1.td')
| -rw-r--r-- | llvm/test/TableGen/FixedLenDecoderEmitter/sub-arg-dag-error-1.td | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/llvm/test/TableGen/FixedLenDecoderEmitter/sub-arg-dag-error-1.td b/llvm/test/TableGen/FixedLenDecoderEmitter/sub-arg-dag-error-1.td new file mode 100644 index 000000000000..7090eaf20a9a --- /dev/null +++ b/llvm/test/TableGen/FixedLenDecoderEmitter/sub-arg-dag-error-1.td @@ -0,0 +1,28 @@ +// RUN: not llvm-tblgen -gen-disassembler -I %p/../../../include %s 2>&1 \ +// RUN: | FileCheck %s --implicit-check-not=error: + +include "llvm/Target/Target.td" + +def R0 : Register<"r0">; +def RC : RegisterClass<"MyTarget", [i32], 32, (add R0)>; + +// Used to crash. +// CHECK: error: In instruction 'I', operand #0 has 1 sub-arg names, but no sub-operands + +def I : Instruction { + let Size = 1; + bits<8> Inst; + bits<1> r; + + let Inst{0} = 0; + let Inst{1} = r; + + let OutOperandList = (outs); + let InOperandList = (ins (RC $r):$op); +} + +def II : InstrInfo; + +def MyTarget : Target { + let InstructionSet = II; +} |
