diff options
Diffstat (limited to 'llvm/test/MachineVerifier')
13 files changed, 138 insertions, 12 deletions
diff --git a/llvm/test/MachineVerifier/AMDGPU/fix-illegal-vector-copies.mir b/llvm/test/MachineVerifier/AMDGPU/fix-illegal-vector-copies.mir index 48aabf8e9a84..c15619c1b7fc 100644 --- a/llvm/test/MachineVerifier/AMDGPU/fix-illegal-vector-copies.mir +++ b/llvm/test/MachineVerifier/AMDGPU/fix-illegal-vector-copies.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=none -filetype=null %s 2>&1 | FileCheck %s --- name: fix-illegal-vector-copies diff --git a/llvm/test/MachineVerifier/AMDGPU/undef-should-only-be-set-on-subreg-defs.mir b/llvm/test/MachineVerifier/AMDGPU/undef-should-only-be-set-on-subreg-defs.mir index 89d2e76c7fed..f5d26192eacf 100644 --- a/llvm/test/MachineVerifier/AMDGPU/undef-should-only-be-set-on-subreg-defs.mir +++ b/llvm/test/MachineVerifier/AMDGPU/undef-should-only-be-set-on-subreg-defs.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=none -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=none -filetype=null %s 2>&1 | FileCheck %s --- name: undef_reg_def diff --git a/llvm/test/MachineVerifier/AMDGPU/unsupported-unaligned-vgpr-check-vsrc-operand.mir b/llvm/test/MachineVerifier/AMDGPU/unsupported-unaligned-vgpr-check-vsrc-operand.mir new file mode 100644 index 000000000000..1a067f01e4a9 --- /dev/null +++ b/llvm/test/MachineVerifier/AMDGPU/unsupported-unaligned-vgpr-check-vsrc-operand.mir @@ -0,0 +1,34 @@ +# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -run-pass=none -filetype=null %s 2>&1 | FileCheck -implicit-check-not="Bad machine code" %s + +# 64-bit vsrc operands were not correctly diagnosed with unaligned registers. + +--- +name: uses_unaligned_physreg +tracksRegLiveness: true +body: | + bb.0: + liveins: $vgpr1_vgpr2 + + ; CHECK: *** Bad machine code: Subtarget requires even aligned vector registers *** + ; CHECK: - instruction: $vcc = V_CMP_NE_U64_e64 0, $vgpr1_vgpr2, implicit $exec + ; CHECK: *** Bad machine code: Illegal physical register for instruction *** + $vcc = V_CMP_NE_U64_e64 0, $vgpr1_vgpr2, implicit $exec + + ; CHECK: *** Bad machine code: Subtarget requires even aligned vector registers *** + ; CHECK: *** Bad machine code: Illegal physical register for instruction *** + ; CHECK: - instruction: V_CMP_NE_U64_e32 0, $vgpr1_vgpr2, implicit-def $vcc, implicit $exec + V_CMP_NE_U64_e32 0, $vgpr1_vgpr2, implicit-def $vcc, implicit $exec + + %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec + %1:vgpr_32 = V_MOV_B32_e32 1, implicit $exec + %2:vreg_64 = IMPLICIT_DEF + + ; CHECK: *** Bad machine code: Subtarget requires even aligned vector registers *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + %3:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 %0, %1, %2, 0, 0, 0, implicit $mode, implicit $exec + %4:vreg_64 = IMPLICIT_DEF + + ; CHECK: *** Bad machine code: Subtarget requires even aligned vector registers *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + %5:vreg_128_align2 = V_MFMA_F32_4X4X1F32_vgprcd_e64 %0, %1, %4, 0, 0, 0, implicit $mode, implicit $exec +... diff --git a/llvm/test/MachineVerifier/AMDGPU/verifier-ec-subreg-liveness.mir b/llvm/test/MachineVerifier/AMDGPU/verifier-ec-subreg-liveness.mir index d2a57afb440a..4a972dec22e4 100644 --- a/llvm/test/MachineVerifier/AMDGPU/verifier-ec-subreg-liveness.mir +++ b/llvm/test/MachineVerifier/AMDGPU/verifier-ec-subreg-liveness.mir @@ -10,7 +10,7 @@ body: | liveins: $vgpr0_vgpr1 ; CHECK-NOT: *** Bad machine code: Inconsistent valno->def *** - INLINEASM &"", 0 /* attdialect */, 1835019 /* regdef-ec:VGPR_32 */, def undef early-clobber %0.sub0:vreg_64, 1835018 /* regdef:VGPR_32 */, def undef %0.sub1:vreg_64 + INLINEASM &"", 0 /* attdialect */, 2228235 /* regdef-ec:VGPR_32 */, def undef early-clobber %0.sub0:vreg_64, 2228234 /* regdef:VGPR_32 */, def undef %0.sub1:vreg_64 FLAT_STORE_DWORDX2 $vgpr0_vgpr1, %0, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64)) S_ENDPGM 0 @@ -23,7 +23,7 @@ body: | liveins: $vgpr0_vgpr1 ; CHECK-NOT: *** Bad machine code: Inconsistent valno->def *** - INLINEASM &"", 0 /* attdialect */, 1835018 /* regdef:VGPR_32 */, def undef %0.sub0:vreg_64, 1835019 /* regdef-ec:VGPR_32 */, def undef early-clobber %0.sub1:vreg_64 + INLINEASM &"", 0 /* attdialect */, 2228234 /* regdef:VGPR_32 */, def undef %0.sub0:vreg_64, 2228235 /* regdef-ec:VGPR_32 */, def undef early-clobber %0.sub1:vreg_64 FLAT_STORE_DWORDX2 $vgpr0_vgpr1, %0, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64)) S_ENDPGM 0 diff --git a/llvm/test/MachineVerifier/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir b/llvm/test/MachineVerifier/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir index a790a55f19bd..c0f222407b26 100644 --- a/llvm/test/MachineVerifier/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir +++ b/llvm/test/MachineVerifier/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s +# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -filetype=null %s 2>&1 | FileCheck -check-prefix=ERROR %s # When the verifier was detecting the invalid liveness for vcc, it would assert when trying to iterate the subregisters of the implicit virtual register use. diff --git a/llvm/test/MachineVerifier/AMDGPU/verify-av-mov-imm-pseudo.mir b/llvm/test/MachineVerifier/AMDGPU/verify-av-mov-imm-pseudo.mir index 8973de09d967..31dda17f01e2 100644 --- a/llvm/test/MachineVerifier/AMDGPU/verify-av-mov-imm-pseudo.mir +++ b/llvm/test/MachineVerifier/AMDGPU/verify-av-mov-imm-pseudo.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -run-pass=none -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -run-pass=none -filetype=null %s 2>&1 | FileCheck %s --- name: invalid_av_mov_b32_imm_pseudo tracksRegLiveness: true diff --git a/llvm/test/MachineVerifier/AMDGPU/verify-ds-vdata-vdst-both-agpr-or-vgpr.mir b/llvm/test/MachineVerifier/AMDGPU/verify-ds-vdata-vdst-both-agpr-or-vgpr.mir new file mode 100644 index 000000000000..956a8b80e408 --- /dev/null +++ b/llvm/test/MachineVerifier/AMDGPU/verify-ds-vdata-vdst-both-agpr-or-vgpr.mir @@ -0,0 +1,92 @@ +# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -run-pass=none -filetype=null %s 2>&1 | FileCheck -implicit-check-not=Bad %s + +--- +name: invalid_mixed_agpr_vgpr_ops_ds_atomic +tracksRegLiveness: true +body: | + bb.0: + + %addr:vgpr_32 = IMPLICIT_DEF + %vgpr:vgpr_32 = IMPLICIT_DEF + %agpr:agpr_32 = IMPLICIT_DEF + %a_or_v:av_32 = IMPLICIT_DEF + + ; CHECK: Bad machine code: Invalid register class: vdata and vdst should be both VGPR or AGPR + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + %4:agpr_32 = DS_CMPST_RTN_B32_gfx9 %addr, %vgpr, %vgpr, 0, 0, implicit $exec :: (load store seq_cst monotonic (s32), addrspace 3) + + ; CHECK: Bad machine code: Invalid register class: vdata and vdst should be both VGPR or AGPR + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + %5:vgpr_32 = DS_CMPST_RTN_B32_gfx9 %addr, %agpr, %vgpr, 0, 0, implicit $exec :: (load store seq_cst monotonic (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Invalid register class: both data operands should be VGPR or AGPR *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + %6:vgpr_32 = DS_CMPST_RTN_B32_gfx9 %addr, %vgpr, %agpr, 0, 0, implicit $exec :: (load store seq_cst monotonic (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + %7:av_32 = DS_CMPST_RTN_B32_gfx9 %addr, %vgpr, %vgpr, 0, 0, implicit $exec :: (load store seq_cst monotonic (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + %8:vgpr_32 = DS_CMPST_RTN_B32_gfx9 %vgpr, %a_or_v, %vgpr, 0, 0, implicit $exec :: (load store seq_cst monotonic (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + %9:vgpr_32 = DS_CMPST_RTN_B32_gfx9 %vgpr, %vgpr, %a_or_v, 0, 0, implicit $exec :: (load store seq_cst monotonic (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Invalid register class: vdata and vdst should be both VGPR or AGPR *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + %10:av_32 = DS_CMPST_RTN_B32_gfx9 %addr, %agpr, %agpr, 0, 0, implicit $exec :: (load store seq_cst monotonic (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Invalid register class: vdata and vdst should be both VGPR or AGPR *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + %11:agpr_32 = DS_CMPST_RTN_B32_gfx9 %addr, %a_or_v, %agpr, 0, 0, implicit $exec :: (load store seq_cst monotonic (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Invalid register class: both data operands should be VGPR or AGPR *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + %12:agpr_32 = DS_CMPST_RTN_B32_gfx9 %addr, %agpr, %a_or_v, 0, 0, implicit $exec :: (load store seq_cst monotonic (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Invalid register class: vdata and vdst should be both VGPR or AGPR *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + %13:agpr_32 = DS_CMPST_RTN_B32_gfx9 %addr, %a_or_v, %a_or_v, 0, 0, implicit $exec :: (load store seq_cst monotonic (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + %14:av_32 = DS_CMPST_RTN_B32_gfx9 %addr, %a_or_v, %a_or_v, 0, 0, implicit $exec :: (load store seq_cst monotonic (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + DS_WRITE2_B32_gfx9 %addr, %a_or_v, %a_or_v, 10, 24, 0, implicit $exec :: (store (s32), addrspace 3), (store (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Invalid register class: both data operands should be VGPR or AGPR *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + DS_WRITE2_B32_gfx9 %addr, %agpr, %vgpr, 10, 24, 0, implicit $exec :: (store (s32), addrspace 3), (store (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Invalid register class: both data operands should be VGPR or AGPR *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + DS_WRITE2_B32_gfx9 %addr, %vgpr, %agpr, 10, 24, 0, implicit $exec :: (store (s32), addrspace 3), (store (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + DS_WRITE2_B32_gfx9 %addr, %vgpr, %a_or_v, 10, 24, 0, implicit $exec :: (store (s32), addrspace 3), (store (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + DS_WRITE2_B32_gfx9 %addr, %a_or_v, %vgpr, 10, 24, 0, implicit $exec :: (store (s32), addrspace 3), (store (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Invalid register class: both data operands should be VGPR or AGPR *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + DS_WRITE2_B32_gfx9 %addr, %agpr, %a_or_v, 10, 24, 0, implicit $exec :: (store (s32), addrspace 3), (store (s32), addrspace 3) + + ; CHECK: *** Bad machine code: Invalid register class: both data operands should be VGPR or AGPR *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + ; CHECK: *** Bad machine code: Illegal virtual register for instruction *** + DS_WRITE2_B32_gfx9 %addr, %a_or_v, %agpr, 10, 24, 0, implicit $exec :: (store (s32), addrspace 3), (store (s32), addrspace 3) + +... diff --git a/llvm/test/MachineVerifier/AMDGPU/verify-implicit-def.mir b/llvm/test/MachineVerifier/AMDGPU/verify-implicit-def.mir index 324e424d563f..04609ac989b3 100644 --- a/llvm/test/MachineVerifier/AMDGPU/verify-implicit-def.mir +++ b/llvm/test/MachineVerifier/AMDGPU/verify-implicit-def.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=none -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=none -filetype=null %s 2>&1 | FileCheck %s --- name: invalid_reg_sequence diff --git a/llvm/test/MachineVerifier/AMDGPU/verify-reg-sequence.mir b/llvm/test/MachineVerifier/AMDGPU/verify-reg-sequence.mir index 59625cd81ec3..384184044221 100644 --- a/llvm/test/MachineVerifier/AMDGPU/verify-reg-sequence.mir +++ b/llvm/test/MachineVerifier/AMDGPU/verify-reg-sequence.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=none -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=none -filetype=null %s 2>&1 | FileCheck %s --- name: invalid_reg_sequence diff --git a/llvm/test/MachineVerifier/convergencectrl/AMDGPU/basic.mir b/llvm/test/MachineVerifier/convergencectrl/AMDGPU/basic.mir index cb06d90ccd7f..e76514225871 100644 --- a/llvm/test/MachineVerifier/convergencectrl/AMDGPU/basic.mir +++ b/llvm/test/MachineVerifier/convergencectrl/AMDGPU/basic.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=amdgcn -run-pass=none -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not --crash llc -mtriple=amdgcn -run-pass=none -verify-machineinstrs -filetype=null %s 2>&1 | FileCheck %s --- name: basic tracksRegLiveness: true diff --git a/llvm/test/MachineVerifier/convergencectrl/AMDGPU/cycles.mir b/llvm/test/MachineVerifier/convergencectrl/AMDGPU/cycles.mir index d935d8ea4be5..c3b26afc3d2a 100644 --- a/llvm/test/MachineVerifier/convergencectrl/AMDGPU/cycles.mir +++ b/llvm/test/MachineVerifier/convergencectrl/AMDGPU/cycles.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=amdgcn -run-pass=none -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not --crash llc -mtriple=amdgcn -run-pass=none -verify-machineinstrs -filetype=null %s 2>&1 | FileCheck %s --- name: cycles body: | diff --git a/llvm/test/MachineVerifier/convergencectrl/AMDGPU/mixed2.mir b/llvm/test/MachineVerifier/convergencectrl/AMDGPU/mixed2.mir index 7893837126e7..3fb04e97240d 100644 --- a/llvm/test/MachineVerifier/convergencectrl/AMDGPU/mixed2.mir +++ b/llvm/test/MachineVerifier/convergencectrl/AMDGPU/mixed2.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=amdgcn -run-pass=none -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not --crash llc -mtriple=amdgcn -run-pass=none -verify-machineinstrs -filetype=null %s 2>&1 | FileCheck %s --- name: mixed2 body: | diff --git a/llvm/test/MachineVerifier/convergencectrl/AMDGPU/region-nesting.mir b/llvm/test/MachineVerifier/convergencectrl/AMDGPU/region-nesting.mir index e9588d25d774..7042e4a847fb 100644 --- a/llvm/test/MachineVerifier/convergencectrl/AMDGPU/region-nesting.mir +++ b/llvm/test/MachineVerifier/convergencectrl/AMDGPU/region-nesting.mir @@ -1,4 +1,4 @@ -# RUN: not --crash llc -mtriple=amdgcn -run-pass=none -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not --crash llc -mtriple=amdgcn -run-pass=none -verify-machineinstrs -filetype=null %s 2>&1 | FileCheck %s --- name: region_nesting body: | |