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Diffstat (limited to 'llvm/test/CodeGen/X86/lrint-conv-i64.ll')
-rw-r--r--llvm/test/CodeGen/X86/lrint-conv-i64.ll317
1 files changed, 268 insertions, 49 deletions
diff --git a/llvm/test/CodeGen/X86/lrint-conv-i64.ll b/llvm/test/CodeGen/X86/lrint-conv-i64.ll
index 2ba1500df0b6..731c03bf0d74 100644
--- a/llvm/test/CodeGen/X86/lrint-conv-i64.ll
+++ b/llvm/test/CodeGen/X86/lrint-conv-i64.ll
@@ -1,92 +1,311 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
+; RUN: llc < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=CHECK,SSE
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=CHECK,AVX
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=CHECK,AVX
-define i64 @testmsxh(half %x) nounwind {
-; SSE-LABEL: testmsxh:
-; SSE: # %bb.0: # %entry
-; SSE-NEXT: pushq %rax
-; SSE-NEXT: callq __extendhfsf2@PLT
-; SSE-NEXT: callq rintf@PLT
-; SSE-NEXT: callq __truncsfhf2@PLT
-; SSE-NEXT: callq __extendhfsf2@PLT
-; SSE-NEXT: cvttss2si %xmm0, %rax
-; SSE-NEXT: popq %rcx
-; SSE-NEXT: retq
-entry:
- %0 = tail call i64 @llvm.lrint.i64.f16(half %x)
- ret i64 %0
-}
+; FIXME: crash
+; define i64 @test_lrint_i64_f16(half %x) nounwind {
+; %conv = tail call i64 @llvm.lrint.i64.f16(half %x)
+; ret i64 %conv
+; }
-define i64 @testmsxs(float %x) nounwind {
-; SSE-LABEL: testmsxs:
-; SSE: # %bb.0: # %entry
+define i64 @test_lrint_i64_f32(float %x) nounwind {
+; X86-NOSSE-LABEL: test_lrint_i64_f32:
+; X86-NOSSE: # %bb.0:
+; X86-NOSSE-NEXT: pushl %ebp
+; X86-NOSSE-NEXT: movl %esp, %ebp
+; X86-NOSSE-NEXT: andl $-8, %esp
+; X86-NOSSE-NEXT: subl $8, %esp
+; X86-NOSSE-NEXT: flds 8(%ebp)
+; X86-NOSSE-NEXT: fistpll (%esp)
+; X86-NOSSE-NEXT: movl (%esp), %eax
+; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NOSSE-NEXT: movl %ebp, %esp
+; X86-NOSSE-NEXT: popl %ebp
+; X86-NOSSE-NEXT: retl
+;
+; X86-SSE2-LABEL: test_lrint_i64_f32:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pushl %ebp
+; X86-SSE2-NEXT: movl %esp, %ebp
+; X86-SSE2-NEXT: andl $-8, %esp
+; X86-SSE2-NEXT: subl $8, %esp
+; X86-SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-SSE2-NEXT: movss %xmm0, (%esp)
+; X86-SSE2-NEXT: flds (%esp)
+; X86-SSE2-NEXT: fistpll (%esp)
+; X86-SSE2-NEXT: movl (%esp), %eax
+; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-SSE2-NEXT: movl %ebp, %esp
+; X86-SSE2-NEXT: popl %ebp
+; X86-SSE2-NEXT: retl
+;
+; SSE-LABEL: test_lrint_i64_f32:
+; SSE: # %bb.0:
; SSE-NEXT: cvtss2si %xmm0, %rax
; SSE-NEXT: retq
;
-; AVX-LABEL: testmsxs:
-; AVX: # %bb.0: # %entry
+; AVX-LABEL: test_lrint_i64_f32:
+; AVX: # %bb.0:
; AVX-NEXT: vcvtss2si %xmm0, %rax
; AVX-NEXT: retq
-entry:
- %0 = tail call i64 @llvm.lrint.i64.f32(float %x)
- ret i64 %0
+ %conv = tail call i64 @llvm.lrint.i64.f32(float %x)
+ ret i64 %conv
}
-define i64 @testmsxd(double %x) nounwind {
-; SSE-LABEL: testmsxd:
-; SSE: # %bb.0: # %entry
+define i64 @test_lrint_i64_f64(double %x) nounwind {
+; X86-NOSSE-LABEL: test_lrint_i64_f64:
+; X86-NOSSE: # %bb.0:
+; X86-NOSSE-NEXT: pushl %ebp
+; X86-NOSSE-NEXT: movl %esp, %ebp
+; X86-NOSSE-NEXT: andl $-8, %esp
+; X86-NOSSE-NEXT: subl $8, %esp
+; X86-NOSSE-NEXT: fldl 8(%ebp)
+; X86-NOSSE-NEXT: fistpll (%esp)
+; X86-NOSSE-NEXT: movl (%esp), %eax
+; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NOSSE-NEXT: movl %ebp, %esp
+; X86-NOSSE-NEXT: popl %ebp
+; X86-NOSSE-NEXT: retl
+;
+; X86-SSE2-LABEL: test_lrint_i64_f64:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pushl %ebp
+; X86-SSE2-NEXT: movl %esp, %ebp
+; X86-SSE2-NEXT: andl $-8, %esp
+; X86-SSE2-NEXT: subl $8, %esp
+; X86-SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE2-NEXT: movsd %xmm0, (%esp)
+; X86-SSE2-NEXT: fldl (%esp)
+; X86-SSE2-NEXT: fistpll (%esp)
+; X86-SSE2-NEXT: movl (%esp), %eax
+; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-SSE2-NEXT: movl %ebp, %esp
+; X86-SSE2-NEXT: popl %ebp
+; X86-SSE2-NEXT: retl
+;
+; SSE-LABEL: test_lrint_i64_f64:
+; SSE: # %bb.0:
; SSE-NEXT: cvtsd2si %xmm0, %rax
; SSE-NEXT: retq
;
-; AVX-LABEL: testmsxd:
-; AVX: # %bb.0: # %entry
+; AVX-LABEL: test_lrint_i64_f64:
+; AVX: # %bb.0:
; AVX-NEXT: vcvtsd2si %xmm0, %rax
; AVX-NEXT: retq
-entry:
- %0 = tail call i64 @llvm.lrint.i64.f64(double %x)
- ret i64 %0
+ %conv = tail call i64 @llvm.lrint.i64.f64(double %x)
+ ret i64 %conv
}
-define i64 @testmsll(x86_fp80 %x) nounwind {
-; CHECK-LABEL: testmsll:
-; CHECK: # %bb.0: # %entry
+define i64 @test_lrint_i64_f80(x86_fp80 %x) nounwind {
+; X86-LABEL: test_lrint_i64_f80:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebp
+; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: andl $-8, %esp
+; X86-NEXT: subl $8, %esp
+; X86-NEXT: fldt 8(%ebp)
+; X86-NEXT: fistpll (%esp)
+; X86-NEXT: movl (%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %ebp, %esp
+; X86-NEXT: popl %ebp
+; X86-NEXT: retl
+;
+; CHECK-LABEL: test_lrint_i64_f80:
+; CHECK: # %bb.0:
; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
; CHECK-NEXT: fistpll -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movq -{{[0-9]+}}(%rsp), %rax
; CHECK-NEXT: retq
-entry:
- %0 = tail call i64 @llvm.lrint.i64.f80(x86_fp80 %x)
- ret i64 %0
+ %conv = tail call i64 @llvm.lrint.i64.f80(x86_fp80 %x)
+ ret i64 %conv
}
; FIXME(#44744): incorrect libcall
-define i64 @testmsxq(fp128 %x) nounwind {
-; CHECK-LABEL: testmsxq:
-; CHECK: # %bb.0: # %entry
+define i64 @test_lrint_i64_f128(fp128 %x) nounwind {
+; X86-LABEL: test_lrint_i64_f128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebp
+; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $16, %esp
+; X86-NEXT: pushl 20(%ebp)
+; X86-NEXT: pushl 16(%ebp)
+; X86-NEXT: pushl 12(%ebp)
+; X86-NEXT: pushl 8(%ebp)
+; X86-NEXT: calll lrintl
+; X86-NEXT: addl $16, %esp
+; X86-NEXT: movl %ebp, %esp
+; X86-NEXT: popl %ebp
+; X86-NEXT: retl
+;
+; CHECK-LABEL: test_lrint_i64_f128:
+; CHECK: # %bb.0:
; CHECK-NEXT: jmp lrintl@PLT # TAILCALL
-entry:
- %0 = tail call i64 @llvm.lrint.i64.f128(fp128 %x)
- ret i64 %0
+ %conv = tail call i64 @llvm.lrint.i64.f128(fp128 %x)
+ ret i64 %conv
+}
+
+; FIXME: crash
+; define i64 @test_lrint_i64_f16_strict(half %x) nounwind {
+; %conv = tail call i64 @llvm.experimental.constrained.lrint.i64.f16(half %x, metadata!"round.dynamic", metadata!"fpexcept.strict")
+; ret i64 %conv
+; }
+
+define i64 @test_lrint_i64_f32_strict(float %x) nounwind {
+; X86-NOSSE-LABEL: test_lrint_i64_f32_strict:
+; X86-NOSSE: # %bb.0:
+; X86-NOSSE-NEXT: pushl %eax
+; X86-NOSSE-NEXT: flds {{[0-9]+}}(%esp)
+; X86-NOSSE-NEXT: fstps (%esp)
+; X86-NOSSE-NEXT: calll lrintf
+; X86-NOSSE-NEXT: popl %ecx
+; X86-NOSSE-NEXT: retl
+;
+; X86-SSE2-LABEL: test_lrint_i64_f32_strict:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pushl %eax
+; X86-SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-SSE2-NEXT: movss %xmm0, (%esp)
+; X86-SSE2-NEXT: calll lrintf
+; X86-SSE2-NEXT: popl %ecx
+; X86-SSE2-NEXT: retl
+;
+; CHECK-LABEL: test_lrint_i64_f32_strict:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: callq lrintf@PLT
+; CHECK-NEXT: popq %rcx
+; CHECK-NEXT: retq
+ %conv = tail call i64 @llvm.experimental.constrained.lrint.i64.f32(float %x, metadata!"round.dynamic", metadata!"fpexcept.strict")
+ ret i64 %conv
+}
+
+define i64 @test_lrint_i64_f64_strict(double %x) nounwind {
+; X86-NOSSE-LABEL: test_lrint_i64_f64_strict:
+; X86-NOSSE: # %bb.0:
+; X86-NOSSE-NEXT: subl $8, %esp
+; X86-NOSSE-NEXT: fldl {{[0-9]+}}(%esp)
+; X86-NOSSE-NEXT: fstpl (%esp)
+; X86-NOSSE-NEXT: calll lrint
+; X86-NOSSE-NEXT: addl $8, %esp
+; X86-NOSSE-NEXT: retl
+;
+; X86-SSE2-LABEL: test_lrint_i64_f64_strict:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: subl $8, %esp
+; X86-SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; X86-SSE2-NEXT: movsd %xmm0, (%esp)
+; X86-SSE2-NEXT: calll lrint
+; X86-SSE2-NEXT: addl $8, %esp
+; X86-SSE2-NEXT: retl
+;
+; CHECK-LABEL: test_lrint_i64_f64_strict:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: callq lrint@PLT
+; CHECK-NEXT: popq %rcx
+; CHECK-NEXT: retq
+ %conv = tail call i64 @llvm.experimental.constrained.lrint.i64.f64(double %x, metadata!"round.dynamic", metadata!"fpexcept.strict")
+ ret i64 %conv
+}
+
+define i64 @test_lrint_i64_f80_strict(x86_fp80 %x) nounwind {
+; X86-LABEL: test_lrint_i64_f80_strict:
+; X86: # %bb.0:
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: fldt {{[0-9]+}}(%esp)
+; X86-NEXT: fstpt (%esp)
+; X86-NEXT: calll lrintl
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
+;
+; CHECK-LABEL: test_lrint_i64_f80_strict:
+; CHECK: # %bb.0:
+; CHECK-NEXT: subq $24, %rsp
+; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
+; CHECK-NEXT: fstpt (%rsp)
+; CHECK-NEXT: callq lrintl@PLT
+; CHECK-NEXT: addq $24, %rsp
+; CHECK-NEXT: retq
+ %conv = tail call i64 @llvm.experimental.constrained.lrint.i64.f80(x86_fp80 %x, metadata!"round.dynamic", metadata!"fpexcept.strict")
+ ret i64 %conv
+}
+
+; FIXME(#44744): incorrect libcall
+define i64 @test_lrint_i64_f128_strict(fp128 %x) nounwind {
+; X86-LABEL: test_lrint_i64_f128_strict:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebp
+; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $16, %esp
+; X86-NEXT: pushl 20(%ebp)
+; X86-NEXT: pushl 16(%ebp)
+; X86-NEXT: pushl 12(%ebp)
+; X86-NEXT: pushl 8(%ebp)
+; X86-NEXT: calll lrintl
+; X86-NEXT: addl $16, %esp
+; X86-NEXT: movl %ebp, %esp
+; X86-NEXT: popl %ebp
+; X86-NEXT: retl
+;
+; CHECK-LABEL: test_lrint_i64_f128_strict:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: callq lrintl@PLT
+; CHECK-NEXT: popq %rcx
+; CHECK-NEXT: retq
+ %conv = tail call i64 @llvm.experimental.constrained.lrint.i64.f128(fp128 %x, metadata!"round.dynamic", metadata!"fpexcept.strict")
+ ret i64 %conv
}
define i32 @PR125324(float %x) nounwind {
+; X86-NOSSE-LABEL: PR125324:
+; X86-NOSSE: # %bb.0:
+; X86-NOSSE-NEXT: pushl %ebp
+; X86-NOSSE-NEXT: movl %esp, %ebp
+; X86-NOSSE-NEXT: andl $-8, %esp
+; X86-NOSSE-NEXT: subl $8, %esp
+; X86-NOSSE-NEXT: flds 8(%ebp)
+; X86-NOSSE-NEXT: fistpll (%esp)
+; X86-NOSSE-NEXT: movl (%esp), %eax
+; X86-NOSSE-NEXT: movl %ebp, %esp
+; X86-NOSSE-NEXT: popl %ebp
+; X86-NOSSE-NEXT: retl
+;
+; X86-SSE2-LABEL: PR125324:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: pushl %ebp
+; X86-SSE2-NEXT: movl %esp, %ebp
+; X86-SSE2-NEXT: andl $-8, %esp
+; X86-SSE2-NEXT: subl $8, %esp
+; X86-SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-SSE2-NEXT: movss %xmm0, (%esp)
+; X86-SSE2-NEXT: flds (%esp)
+; X86-SSE2-NEXT: fistpll (%esp)
+; X86-SSE2-NEXT: movl (%esp), %eax
+; X86-SSE2-NEXT: movl %ebp, %esp
+; X86-SSE2-NEXT: popl %ebp
+; X86-SSE2-NEXT: retl
+;
; SSE-LABEL: PR125324:
-; SSE: # %bb.0: # %entry
+; SSE: # %bb.0:
; SSE-NEXT: cvtss2si %xmm0, %rax
; SSE-NEXT: # kill: def $eax killed $eax killed $rax
; SSE-NEXT: retq
;
; AVX-LABEL: PR125324:
-; AVX: # %bb.0: # %entry
+; AVX: # %bb.0:
; AVX-NEXT: vcvtss2si %xmm0, %rax
; AVX-NEXT: # kill: def $eax killed $eax killed $rax
; AVX-NEXT: retq
-entry:
- %0 = tail call i64 @llvm.lrint.i64.f32(float %x)
- %1 = trunc i64 %0 to i32
- ret i32 %1
+ %conv = tail call i64 @llvm.lrint.i64.f32(float %x)
+ %trunc = trunc i64 %conv to i32
+ ret i32 %trunc
}
declare i64 @llvm.lrint.i64.f32(float) nounwind readnone
generated by cgit v1.2.3 (git 2.25.1) at 2026-05-31 14:55:25 +0000