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Diffstat (limited to 'llvm/test/CodeGen/RISCV/rvv/vrgather.ll')
-rw-r--r--llvm/test/CodeGen/RISCV/rvv/vrgather.ll258
1 files changed, 129 insertions, 129 deletions
diff --git a/llvm/test/CodeGen/RISCV/rvv/vrgather.ll b/llvm/test/CodeGen/RISCV/rvv/vrgather.ll
index 5d700e683a96..91b95a96050d 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vrgather.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vrgather.ll
@@ -19,7 +19,7 @@ define <vscale x 1 x i8> @intrinsic_vrgather_vv_nxv1i8_nxv1i8_nxv1i8(<vscale x 1
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i8> @llvm.riscv.vrgather.vv.nxv1i8.iXLen(
- <vscale x 1 x i8> undef,
+ <vscale x 1 x i8> poison,
<vscale x 1 x i8> %0,
<vscale x 1 x i8> %1,
iXLen %2)
@@ -67,7 +67,7 @@ define <vscale x 2 x i8> @intrinsic_vrgather_vv_nxv2i8_nxv2i8_nxv2i8(<vscale x 2
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i8> @llvm.riscv.vrgather.vv.nxv2i8.iXLen(
- <vscale x 2 x i8> undef,
+ <vscale x 2 x i8> poison,
<vscale x 2 x i8> %0,
<vscale x 2 x i8> %1,
iXLen %2)
@@ -115,7 +115,7 @@ define <vscale x 4 x i8> @intrinsic_vrgather_vv_nxv4i8_nxv4i8_nxv4i8(<vscale x 4
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i8> @llvm.riscv.vrgather.vv.nxv4i8.iXLen(
- <vscale x 4 x i8> undef,
+ <vscale x 4 x i8> poison,
<vscale x 4 x i8> %0,
<vscale x 4 x i8> %1,
iXLen %2)
@@ -163,7 +163,7 @@ define <vscale x 8 x i8> @intrinsic_vrgather_vv_nxv8i8_nxv8i8_nxv8i8(<vscale x 8
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i8> @llvm.riscv.vrgather.vv.nxv8i8.iXLen(
- <vscale x 8 x i8> undef,
+ <vscale x 8 x i8> poison,
<vscale x 8 x i8> %0,
<vscale x 8 x i8> %1,
iXLen %2)
@@ -211,7 +211,7 @@ define <vscale x 16 x i8> @intrinsic_vrgather_vv_nxv16i8_nxv16i8_nxv16i8(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x i8> @llvm.riscv.vrgather.vv.nxv16i8.iXLen(
- <vscale x 16 x i8> undef,
+ <vscale x 16 x i8> poison,
<vscale x 16 x i8> %0,
<vscale x 16 x i8> %1,
iXLen %2)
@@ -259,7 +259,7 @@ define <vscale x 32 x i8> @intrinsic_vrgather_vv_nxv32i8_nxv32i8_nxv32i8(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x i8> @llvm.riscv.vrgather.vv.nxv32i8.iXLen(
- <vscale x 32 x i8> undef,
+ <vscale x 32 x i8> poison,
<vscale x 32 x i8> %0,
<vscale x 32 x i8> %1,
iXLen %2)
@@ -307,7 +307,7 @@ define <vscale x 64 x i8> @intrinsic_vrgather_vv_nxv64i8_nxv64i8_nxv64i8(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 64 x i8> @llvm.riscv.vrgather.vv.nxv64i8.iXLen(
- <vscale x 64 x i8> undef,
+ <vscale x 64 x i8> poison,
<vscale x 64 x i8> %0,
<vscale x 64 x i8> %1,
iXLen %2)
@@ -356,7 +356,7 @@ define <vscale x 1 x i16> @intrinsic_vrgather_vv_nxv1i16_nxv1i16_nxv1i16(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i16> @llvm.riscv.vrgather.vv.nxv1i16.iXLen(
- <vscale x 1 x i16> undef,
+ <vscale x 1 x i16> poison,
<vscale x 1 x i16> %0,
<vscale x 1 x i16> %1,
iXLen %2)
@@ -404,7 +404,7 @@ define <vscale x 2 x i16> @intrinsic_vrgather_vv_nxv2i16_nxv2i16_nxv2i16(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i16> @llvm.riscv.vrgather.vv.nxv2i16.iXLen(
- <vscale x 2 x i16> undef,
+ <vscale x 2 x i16> poison,
<vscale x 2 x i16> %0,
<vscale x 2 x i16> %1,
iXLen %2)
@@ -452,7 +452,7 @@ define <vscale x 4 x i16> @intrinsic_vrgather_vv_nxv4i16_nxv4i16_nxv4i16(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i16> @llvm.riscv.vrgather.vv.nxv4i16.iXLen(
- <vscale x 4 x i16> undef,
+ <vscale x 4 x i16> poison,
<vscale x 4 x i16> %0,
<vscale x 4 x i16> %1,
iXLen %2)
@@ -500,7 +500,7 @@ define <vscale x 8 x i16> @intrinsic_vrgather_vv_nxv8i16_nxv8i16_nxv8i16(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i16> @llvm.riscv.vrgather.vv.nxv8i16.iXLen(
- <vscale x 8 x i16> undef,
+ <vscale x 8 x i16> poison,
<vscale x 8 x i16> %0,
<vscale x 8 x i16> %1,
iXLen %2)
@@ -548,7 +548,7 @@ define <vscale x 16 x i16> @intrinsic_vrgather_vv_nxv16i16_nxv16i16_nxv16i16(<vs
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x i16> @llvm.riscv.vrgather.vv.nxv16i16.iXLen(
- <vscale x 16 x i16> undef,
+ <vscale x 16 x i16> poison,
<vscale x 16 x i16> %0,
<vscale x 16 x i16> %1,
iXLen %2)
@@ -596,7 +596,7 @@ define <vscale x 32 x i16> @intrinsic_vrgather_vv_nxv32i16_nxv32i16_nxv32i16(<vs
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x i16> @llvm.riscv.vrgather.vv.nxv32i16.iXLen(
- <vscale x 32 x i16> undef,
+ <vscale x 32 x i16> poison,
<vscale x 32 x i16> %0,
<vscale x 32 x i16> %1,
iXLen %2)
@@ -645,7 +645,7 @@ define <vscale x 1 x i32> @intrinsic_vrgather_vv_nxv1i32_nxv1i32_nxv1i32(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i32> @llvm.riscv.vrgather.vv.nxv1i32.iXLen(
- <vscale x 1 x i32> undef,
+ <vscale x 1 x i32> poison,
<vscale x 1 x i32> %0,
<vscale x 1 x i32> %1,
iXLen %2)
@@ -693,7 +693,7 @@ define <vscale x 2 x i32> @intrinsic_vrgather_vv_nxv2i32_nxv2i32_nxv2i32(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i32> @llvm.riscv.vrgather.vv.nxv2i32.iXLen(
- <vscale x 2 x i32> undef,
+ <vscale x 2 x i32> poison,
<vscale x 2 x i32> %0,
<vscale x 2 x i32> %1,
iXLen %2)
@@ -741,7 +741,7 @@ define <vscale x 4 x i32> @intrinsic_vrgather_vv_nxv4i32_nxv4i32_nxv4i32(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i32> @llvm.riscv.vrgather.vv.nxv4i32.iXLen(
- <vscale x 4 x i32> undef,
+ <vscale x 4 x i32> poison,
<vscale x 4 x i32> %0,
<vscale x 4 x i32> %1,
iXLen %2)
@@ -789,7 +789,7 @@ define <vscale x 8 x i32> @intrinsic_vrgather_vv_nxv8i32_nxv8i32_nxv8i32(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i32> @llvm.riscv.vrgather.vv.nxv8i32.iXLen(
- <vscale x 8 x i32> undef,
+ <vscale x 8 x i32> poison,
<vscale x 8 x i32> %0,
<vscale x 8 x i32> %1,
iXLen %2)
@@ -837,7 +837,7 @@ define <vscale x 16 x i32> @intrinsic_vrgather_vv_nxv16i32_nxv16i32_nxv16i32(<vs
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x i32> @llvm.riscv.vrgather.vv.nxv16i32.iXLen(
- <vscale x 16 x i32> undef,
+ <vscale x 16 x i32> poison,
<vscale x 16 x i32> %0,
<vscale x 16 x i32> %1,
iXLen %2)
@@ -886,7 +886,7 @@ define <vscale x 1 x i64> @intrinsic_vrgather_vv_nxv1i64_nxv1i64_nxv1i64(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i64> @llvm.riscv.vrgather.vv.nxv1i64.iXLen(
- <vscale x 1 x i64> undef,
+ <vscale x 1 x i64> poison,
<vscale x 1 x i64> %0,
<vscale x 1 x i64> %1,
iXLen %2)
@@ -934,7 +934,7 @@ define <vscale x 2 x i64> @intrinsic_vrgather_vv_nxv2i64_nxv2i64_nxv2i64(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i64> @llvm.riscv.vrgather.vv.nxv2i64.iXLen(
- <vscale x 2 x i64> undef,
+ <vscale x 2 x i64> poison,
<vscale x 2 x i64> %0,
<vscale x 2 x i64> %1,
iXLen %2)
@@ -982,7 +982,7 @@ define <vscale x 4 x i64> @intrinsic_vrgather_vv_nxv4i64_nxv4i64_nxv4i64(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i64> @llvm.riscv.vrgather.vv.nxv4i64.iXLen(
- <vscale x 4 x i64> undef,
+ <vscale x 4 x i64> poison,
<vscale x 4 x i64> %0,
<vscale x 4 x i64> %1,
iXLen %2)
@@ -1030,7 +1030,7 @@ define <vscale x 8 x i64> @intrinsic_vrgather_vv_nxv8i64_nxv8i64_nxv8i64(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i64> @llvm.riscv.vrgather.vv.nxv8i64.iXLen(
- <vscale x 8 x i64> undef,
+ <vscale x 8 x i64> poison,
<vscale x 8 x i64> %0,
<vscale x 8 x i64> %1,
iXLen %2)
@@ -1079,7 +1079,7 @@ define <vscale x 1 x half> @intrinsic_vrgather_vv_nxv1f16_nxv1f16_nxv1i16(<vscal
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x half> @llvm.riscv.vrgather.vv.nxv1f16.iXLen(
- <vscale x 1 x half> undef,
+ <vscale x 1 x half> poison,
<vscale x 1 x half> %0,
<vscale x 1 x i16> %1,
iXLen %2)
@@ -1127,7 +1127,7 @@ define <vscale x 2 x half> @intrinsic_vrgather_vv_nxv2f16_nxv2f16_nxv2i16(<vscal
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x half> @llvm.riscv.vrgather.vv.nxv2f16.iXLen(
- <vscale x 2 x half> undef,
+ <vscale x 2 x half> poison,
<vscale x 2 x half> %0,
<vscale x 2 x i16> %1,
iXLen %2)
@@ -1175,7 +1175,7 @@ define <vscale x 4 x half> @intrinsic_vrgather_vv_nxv4f16_nxv4f16_nxv4i16(<vscal
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x half> @llvm.riscv.vrgather.vv.nxv4f16.iXLen(
- <vscale x 4 x half> undef,
+ <vscale x 4 x half> poison,
<vscale x 4 x half> %0,
<vscale x 4 x i16> %1,
iXLen %2)
@@ -1223,7 +1223,7 @@ define <vscale x 8 x half> @intrinsic_vrgather_vv_nxv8f16_nxv8f16_nxv8i16(<vscal
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x half> @llvm.riscv.vrgather.vv.nxv8f16.iXLen(
- <vscale x 8 x half> undef,
+ <vscale x 8 x half> poison,
<vscale x 8 x half> %0,
<vscale x 8 x i16> %1,
iXLen %2)
@@ -1271,7 +1271,7 @@ define <vscale x 16 x half> @intrinsic_vrgather_vv_nxv16f16_nxv16f16_nxv16i16(<v
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x half> @llvm.riscv.vrgather.vv.nxv16f16.iXLen(
- <vscale x 16 x half> undef,
+ <vscale x 16 x half> poison,
<vscale x 16 x half> %0,
<vscale x 16 x i16> %1,
iXLen %2)
@@ -1319,7 +1319,7 @@ define <vscale x 32 x half> @intrinsic_vrgather_vv_nxv32f16_nxv32f16_nxv32i16(<v
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x half> @llvm.riscv.vrgather.vv.nxv32f16.iXLen(
- <vscale x 32 x half> undef,
+ <vscale x 32 x half> poison,
<vscale x 32 x half> %0,
<vscale x 32 x i16> %1,
iXLen %2)
@@ -1368,7 +1368,7 @@ define <vscale x 1 x float> @intrinsic_vrgather_vv_nxv1f32_nxv1f32_nxv1i32(<vsca
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x float> @llvm.riscv.vrgather.vv.nxv1f32.iXLen(
- <vscale x 1 x float> undef,
+ <vscale x 1 x float> poison,
<vscale x 1 x float> %0,
<vscale x 1 x i32> %1,
iXLen %2)
@@ -1416,7 +1416,7 @@ define <vscale x 2 x float> @intrinsic_vrgather_vv_nxv2f32_nxv2f32_nxv2i32(<vsca
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x float> @llvm.riscv.vrgather.vv.nxv2f32.iXLen(
- <vscale x 2 x float> undef,
+ <vscale x 2 x float> poison,
<vscale x 2 x float> %0,
<vscale x 2 x i32> %1,
iXLen %2)
@@ -1464,7 +1464,7 @@ define <vscale x 4 x float> @intrinsic_vrgather_vv_nxv4f32_nxv4f32_nxv4i32(<vsca
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x float> @llvm.riscv.vrgather.vv.nxv4f32.iXLen(
- <vscale x 4 x float> undef,
+ <vscale x 4 x float> poison,
<vscale x 4 x float> %0,
<vscale x 4 x i32> %1,
iXLen %2)
@@ -1512,7 +1512,7 @@ define <vscale x 8 x float> @intrinsic_vrgather_vv_nxv8f32_nxv8f32_nxv8i32(<vsca
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x float> @llvm.riscv.vrgather.vv.nxv8f32.iXLen(
- <vscale x 8 x float> undef,
+ <vscale x 8 x float> poison,
<vscale x 8 x float> %0,
<vscale x 8 x i32> %1,
iXLen %2)
@@ -1560,7 +1560,7 @@ define <vscale x 16 x float> @intrinsic_vrgather_vv_nxv16f32_nxv16f32_nxv16i32(<
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x float> @llvm.riscv.vrgather.vv.nxv16f32.iXLen(
- <vscale x 16 x float> undef,
+ <vscale x 16 x float> poison,
<vscale x 16 x float> %0,
<vscale x 16 x i32> %1,
iXLen %2)
@@ -1609,7 +1609,7 @@ define <vscale x 1 x double> @intrinsic_vrgather_vv_nxv1f64_nxv1f64_nxv1i64(<vsc
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x double> @llvm.riscv.vrgather.vv.nxv1f64.iXLen(
- <vscale x 1 x double> undef,
+ <vscale x 1 x double> poison,
<vscale x 1 x double> %0,
<vscale x 1 x i64> %1,
iXLen %2)
@@ -1657,7 +1657,7 @@ define <vscale x 2 x double> @intrinsic_vrgather_vv_nxv2f64_nxv2f64_nxv2i64(<vsc
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x double> @llvm.riscv.vrgather.vv.nxv2f64.iXLen(
- <vscale x 2 x double> undef,
+ <vscale x 2 x double> poison,
<vscale x 2 x double> %0,
<vscale x 2 x i64> %1,
iXLen %2)
@@ -1705,7 +1705,7 @@ define <vscale x 4 x double> @intrinsic_vrgather_vv_nxv4f64_nxv4f64_nxv4i64(<vsc
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x double> @llvm.riscv.vrgather.vv.nxv4f64.iXLen(
- <vscale x 4 x double> undef,
+ <vscale x 4 x double> poison,
<vscale x 4 x double> %0,
<vscale x 4 x i64> %1,
iXLen %2)
@@ -1753,7 +1753,7 @@ define <vscale x 8 x double> @intrinsic_vrgather_vv_nxv8f64_nxv8f64_nxv8i64(<vsc
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x double> @llvm.riscv.vrgather.vv.nxv8f64.iXLen(
- <vscale x 8 x double> undef,
+ <vscale x 8 x double> poison,
<vscale x 8 x double> %0,
<vscale x 8 x i64> %1,
iXLen %2)
@@ -1802,7 +1802,7 @@ define <vscale x 1 x i8> @intrinsic_vrgather_vx_nxv1i8_nxv1i8(<vscale x 1 x i8>
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i8> @llvm.riscv.vrgather.vx.nxv1i8.iXLen(
- <vscale x 1 x i8> undef,
+ <vscale x 1 x i8> poison,
<vscale x 1 x i8> %0,
iXLen %1,
iXLen %2)
@@ -1850,7 +1850,7 @@ define <vscale x 2 x i8> @intrinsic_vrgather_vx_nxv2i8_nxv2i8(<vscale x 2 x i8>
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i8> @llvm.riscv.vrgather.vx.nxv2i8.iXLen(
- <vscale x 2 x i8> undef,
+ <vscale x 2 x i8> poison,
<vscale x 2 x i8> %0,
iXLen %1,
iXLen %2)
@@ -1898,7 +1898,7 @@ define <vscale x 4 x i8> @intrinsic_vrgather_vx_nxv4i8_nxv4i8(<vscale x 4 x i8>
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i8> @llvm.riscv.vrgather.vx.nxv4i8.iXLen(
- <vscale x 4 x i8> undef,
+ <vscale x 4 x i8> poison,
<vscale x 4 x i8> %0,
iXLen %1,
iXLen %2)
@@ -1946,7 +1946,7 @@ define <vscale x 8 x i8> @intrinsic_vrgather_vx_nxv8i8_nxv8i8(<vscale x 8 x i8>
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i8> @llvm.riscv.vrgather.vx.nxv8i8.iXLen(
- <vscale x 8 x i8> undef,
+ <vscale x 8 x i8> poison,
<vscale x 8 x i8> %0,
iXLen %1,
iXLen %2)
@@ -1994,7 +1994,7 @@ define <vscale x 16 x i8> @intrinsic_vrgather_vx_nxv16i8_nxv16i8(<vscale x 16 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x i8> @llvm.riscv.vrgather.vx.nxv16i8.iXLen(
- <vscale x 16 x i8> undef,
+ <vscale x 16 x i8> poison,
<vscale x 16 x i8> %0,
iXLen %1,
iXLen %2)
@@ -2042,7 +2042,7 @@ define <vscale x 32 x i8> @intrinsic_vrgather_vx_nxv32i8_nxv32i8(<vscale x 32 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x i8> @llvm.riscv.vrgather.vx.nxv32i8.iXLen(
- <vscale x 32 x i8> undef,
+ <vscale x 32 x i8> poison,
<vscale x 32 x i8> %0,
iXLen %1,
iXLen %2)
@@ -2090,7 +2090,7 @@ define <vscale x 64 x i8> @intrinsic_vrgather_vx_nxv64i8_nxv64i8(<vscale x 64 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 64 x i8> @llvm.riscv.vrgather.vx.nxv64i8.iXLen(
- <vscale x 64 x i8> undef,
+ <vscale x 64 x i8> poison,
<vscale x 64 x i8> %0,
iXLen %1,
iXLen %2)
@@ -2138,7 +2138,7 @@ define <vscale x 1 x i16> @intrinsic_vrgather_vx_nxv1i16_nxv1i16(<vscale x 1 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i16> @llvm.riscv.vrgather.vx.nxv1i16.iXLen(
- <vscale x 1 x i16> undef,
+ <vscale x 1 x i16> poison,
<vscale x 1 x i16> %0,
iXLen %1,
iXLen %2)
@@ -2186,7 +2186,7 @@ define <vscale x 2 x i16> @intrinsic_vrgather_vx_nxv2i16_nxv2i16(<vscale x 2 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i16> @llvm.riscv.vrgather.vx.nxv2i16.iXLen(
- <vscale x 2 x i16> undef,
+ <vscale x 2 x i16> poison,
<vscale x 2 x i16> %0,
iXLen %1,
iXLen %2)
@@ -2234,7 +2234,7 @@ define <vscale x 4 x i16> @intrinsic_vrgather_vx_nxv4i16_nxv4i16(<vscale x 4 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i16> @llvm.riscv.vrgather.vx.nxv4i16.iXLen(
- <vscale x 4 x i16> undef,
+ <vscale x 4 x i16> poison,
<vscale x 4 x i16> %0,
iXLen %1,
iXLen %2)
@@ -2282,7 +2282,7 @@ define <vscale x 8 x i16> @intrinsic_vrgather_vx_nxv8i16_nxv8i16(<vscale x 8 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i16> @llvm.riscv.vrgather.vx.nxv8i16.iXLen(
- <vscale x 8 x i16> undef,
+ <vscale x 8 x i16> poison,
<vscale x 8 x i16> %0,
iXLen %1,
iXLen %2)
@@ -2330,7 +2330,7 @@ define <vscale x 16 x i16> @intrinsic_vrgather_vx_nxv16i16_nxv16i16(<vscale x 16
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x i16> @llvm.riscv.vrgather.vx.nxv16i16.iXLen(
- <vscale x 16 x i16> undef,
+ <vscale x 16 x i16> poison,
<vscale x 16 x i16> %0,
iXLen %1,
iXLen %2)
@@ -2378,7 +2378,7 @@ define <vscale x 32 x i16> @intrinsic_vrgather_vx_nxv32i16_nxv32i16(<vscale x 32
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x i16> @llvm.riscv.vrgather.vx.nxv32i16.iXLen(
- <vscale x 32 x i16> undef,
+ <vscale x 32 x i16> poison,
<vscale x 32 x i16> %0,
iXLen %1,
iXLen %2)
@@ -2426,7 +2426,7 @@ define <vscale x 1 x i32> @intrinsic_vrgather_vx_nxv1i32_nxv1i32(<vscale x 1 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i32> @llvm.riscv.vrgather.vx.nxv1i32.iXLen(
- <vscale x 1 x i32> undef,
+ <vscale x 1 x i32> poison,
<vscale x 1 x i32> %0,
iXLen %1,
iXLen %2)
@@ -2474,7 +2474,7 @@ define <vscale x 2 x i32> @intrinsic_vrgather_vx_nxv2i32_nxv2i32(<vscale x 2 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i32> @llvm.riscv.vrgather.vx.nxv2i32.iXLen(
- <vscale x 2 x i32> undef,
+ <vscale x 2 x i32> poison,
<vscale x 2 x i32> %0,
iXLen %1,
iXLen %2)
@@ -2522,7 +2522,7 @@ define <vscale x 4 x i32> @intrinsic_vrgather_vx_nxv4i32_nxv4i32(<vscale x 4 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i32> @llvm.riscv.vrgather.vx.nxv4i32.iXLen(
- <vscale x 4 x i32> undef,
+ <vscale x 4 x i32> poison,
<vscale x 4 x i32> %0,
iXLen %1,
iXLen %2)
@@ -2570,7 +2570,7 @@ define <vscale x 8 x i32> @intrinsic_vrgather_vx_nxv8i32_nxv8i32(<vscale x 8 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i32> @llvm.riscv.vrgather.vx.nxv8i32.iXLen(
- <vscale x 8 x i32> undef,
+ <vscale x 8 x i32> poison,
<vscale x 8 x i32> %0,
iXLen %1,
iXLen %2)
@@ -2618,7 +2618,7 @@ define <vscale x 16 x i32> @intrinsic_vrgather_vx_nxv16i32_nxv16i32(<vscale x 16
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x i32> @llvm.riscv.vrgather.vx.nxv16i32.iXLen(
- <vscale x 16 x i32> undef,
+ <vscale x 16 x i32> poison,
<vscale x 16 x i32> %0,
iXLen %1,
iXLen %2)
@@ -2666,7 +2666,7 @@ define <vscale x 1 x i64> @intrinsic_vrgather_vx_nxv1i64_nxv1i64(<vscale x 1 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i64> @llvm.riscv.vrgather.vx.nxv1i64.iXLen(
- <vscale x 1 x i64> undef,
+ <vscale x 1 x i64> poison,
<vscale x 1 x i64> %0,
iXLen %1,
iXLen %2)
@@ -2714,7 +2714,7 @@ define <vscale x 2 x i64> @intrinsic_vrgather_vx_nxv2i64_nxv2i64(<vscale x 2 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i64> @llvm.riscv.vrgather.vx.nxv2i64.iXLen(
- <vscale x 2 x i64> undef,
+ <vscale x 2 x i64> poison,
<vscale x 2 x i64> %0,
iXLen %1,
iXLen %2)
@@ -2762,7 +2762,7 @@ define <vscale x 4 x i64> @intrinsic_vrgather_vx_nxv4i64_nxv4i64(<vscale x 4 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i64> @llvm.riscv.vrgather.vx.nxv4i64.iXLen(
- <vscale x 4 x i64> undef,
+ <vscale x 4 x i64> poison,
<vscale x 4 x i64> %0,
iXLen %1,
iXLen %2)
@@ -2810,7 +2810,7 @@ define <vscale x 8 x i64> @intrinsic_vrgather_vx_nxv8i64_nxv8i64(<vscale x 8 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i64> @llvm.riscv.vrgather.vx.nxv8i64.iXLen(
- <vscale x 8 x i64> undef,
+ <vscale x 8 x i64> poison,
<vscale x 8 x i64> %0,
iXLen %1,
iXLen %2)
@@ -2858,7 +2858,7 @@ define <vscale x 1 x half> @intrinsic_vrgather_vx_nxv1f16_nxv1f16(<vscale x 1 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x half> @llvm.riscv.vrgather.vx.nxv1f16.iXLen(
- <vscale x 1 x half> undef,
+ <vscale x 1 x half> poison,
<vscale x 1 x half> %0,
iXLen %1,
iXLen %2)
@@ -2906,7 +2906,7 @@ define <vscale x 2 x half> @intrinsic_vrgather_vx_nxv2f16_nxv2f16(<vscale x 2 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x half> @llvm.riscv.vrgather.vx.nxv2f16.iXLen(
- <vscale x 2 x half> undef,
+ <vscale x 2 x half> poison,
<vscale x 2 x half> %0,
iXLen %1,
iXLen %2)
@@ -2954,7 +2954,7 @@ define <vscale x 4 x half> @intrinsic_vrgather_vx_nxv4f16_nxv4f16(<vscale x 4 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x half> @llvm.riscv.vrgather.vx.nxv4f16.iXLen(
- <vscale x 4 x half> undef,
+ <vscale x 4 x half> poison,
<vscale x 4 x half> %0,
iXLen %1,
iXLen %2)
@@ -3002,7 +3002,7 @@ define <vscale x 8 x half> @intrinsic_vrgather_vx_nxv8f16_nxv8f16(<vscale x 8 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x half> @llvm.riscv.vrgather.vx.nxv8f16.iXLen(
- <vscale x 8 x half> undef,
+ <vscale x 8 x half> poison,
<vscale x 8 x half> %0,
iXLen %1,
iXLen %2)
@@ -3050,7 +3050,7 @@ define <vscale x 16 x half> @intrinsic_vrgather_vx_nxv16f16_nxv16f16(<vscale x 1
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x half> @llvm.riscv.vrgather.vx.nxv16f16.iXLen(
- <vscale x 16 x half> undef,
+ <vscale x 16 x half> poison,
<vscale x 16 x half> %0,
iXLen %1,
iXLen %2)
@@ -3098,7 +3098,7 @@ define <vscale x 32 x half> @intrinsic_vrgather_vx_nxv32f16_nxv32f16(<vscale x 3
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x half> @llvm.riscv.vrgather.vx.nxv32f16.iXLen(
- <vscale x 32 x half> undef,
+ <vscale x 32 x half> poison,
<vscale x 32 x half> %0,
iXLen %1,
iXLen %2)
@@ -3146,7 +3146,7 @@ define <vscale x 1 x float> @intrinsic_vrgather_vx_nxv1f32_nxv1f32(<vscale x 1 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x float> @llvm.riscv.vrgather.vx.nxv1f32.iXLen(
- <vscale x 1 x float> undef,
+ <vscale x 1 x float> poison,
<vscale x 1 x float> %0,
iXLen %1,
iXLen %2)
@@ -3194,7 +3194,7 @@ define <vscale x 2 x float> @intrinsic_vrgather_vx_nxv2f32_nxv2f32(<vscale x 2 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x float> @llvm.riscv.vrgather.vx.nxv2f32.iXLen(
- <vscale x 2 x float> undef,
+ <vscale x 2 x float> poison,
<vscale x 2 x float> %0,
iXLen %1,
iXLen %2)
@@ -3242,7 +3242,7 @@ define <vscale x 4 x float> @intrinsic_vrgather_vx_nxv4f32_nxv4f32(<vscale x 4 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x float> @llvm.riscv.vrgather.vx.nxv4f32.iXLen(
- <vscale x 4 x float> undef,
+ <vscale x 4 x float> poison,
<vscale x 4 x float> %0,
iXLen %1,
iXLen %2)
@@ -3290,7 +3290,7 @@ define <vscale x 8 x float> @intrinsic_vrgather_vx_nxv8f32_nxv8f32(<vscale x 8 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x float> @llvm.riscv.vrgather.vx.nxv8f32.iXLen(
- <vscale x 8 x float> undef,
+ <vscale x 8 x float> poison,
<vscale x 8 x float> %0,
iXLen %1,
iXLen %2)
@@ -3338,7 +3338,7 @@ define <vscale x 16 x float> @intrinsic_vrgather_vx_nxv16f32_nxv16f32(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x float> @llvm.riscv.vrgather.vx.nxv16f32.iXLen(
- <vscale x 16 x float> undef,
+ <vscale x 16 x float> poison,
<vscale x 16 x float> %0,
iXLen %1,
iXLen %2)
@@ -3386,7 +3386,7 @@ define <vscale x 1 x double> @intrinsic_vrgather_vx_nxv1f64_nxv1f64(<vscale x 1
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x double> @llvm.riscv.vrgather.vx.nxv1f64.iXLen(
- <vscale x 1 x double> undef,
+ <vscale x 1 x double> poison,
<vscale x 1 x double> %0,
iXLen %1,
iXLen %2)
@@ -3434,7 +3434,7 @@ define <vscale x 2 x double> @intrinsic_vrgather_vx_nxv2f64_nxv2f64(<vscale x 2
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x double> @llvm.riscv.vrgather.vx.nxv2f64.iXLen(
- <vscale x 2 x double> undef,
+ <vscale x 2 x double> poison,
<vscale x 2 x double> %0,
iXLen %1,
iXLen %2)
@@ -3482,7 +3482,7 @@ define <vscale x 4 x double> @intrinsic_vrgather_vx_nxv4f64_nxv4f64(<vscale x 4
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x double> @llvm.riscv.vrgather.vx.nxv4f64.iXLen(
- <vscale x 4 x double> undef,
+ <vscale x 4 x double> poison,
<vscale x 4 x double> %0,
iXLen %1,
iXLen %2)
@@ -3530,7 +3530,7 @@ define <vscale x 8 x double> @intrinsic_vrgather_vx_nxv8f64_nxv8f64(<vscale x 8
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x double> @llvm.riscv.vrgather.vx.nxv8f64.iXLen(
- <vscale x 8 x double> undef,
+ <vscale x 8 x double> poison,
<vscale x 8 x double> %0,
iXLen %1,
iXLen %2)
@@ -3572,7 +3572,7 @@ define <vscale x 1 x i8> @intrinsic_vrgather_vi_nxv1i8_nxv1i8(<vscale x 1 x i8>
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i8> @llvm.riscv.vrgather.vx.nxv1i8.iXLen(
- <vscale x 1 x i8> undef,
+ <vscale x 1 x i8> poison,
<vscale x 1 x i8> %0,
iXLen 9,
iXLen %1)
@@ -3606,7 +3606,7 @@ define <vscale x 2 x i8> @intrinsic_vrgather_vi_nxv2i8_nxv2i8(<vscale x 2 x i8>
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i8> @llvm.riscv.vrgather.vx.nxv2i8.iXLen(
- <vscale x 2 x i8> undef,
+ <vscale x 2 x i8> poison,
<vscale x 2 x i8> %0,
iXLen 9,
iXLen %1)
@@ -3640,7 +3640,7 @@ define <vscale x 4 x i8> @intrinsic_vrgather_vi_nxv4i8_nxv4i8(<vscale x 4 x i8>
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i8> @llvm.riscv.vrgather.vx.nxv4i8.iXLen(
- <vscale x 4 x i8> undef,
+ <vscale x 4 x i8> poison,
<vscale x 4 x i8> %0,
iXLen 9,
iXLen %1)
@@ -3674,7 +3674,7 @@ define <vscale x 8 x i8> @intrinsic_vrgather_vi_nxv8i8_nxv8i8(<vscale x 8 x i8>
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i8> @llvm.riscv.vrgather.vx.nxv8i8.iXLen(
- <vscale x 8 x i8> undef,
+ <vscale x 8 x i8> poison,
<vscale x 8 x i8> %0,
iXLen 9,
iXLen %1)
@@ -3708,7 +3708,7 @@ define <vscale x 16 x i8> @intrinsic_vrgather_vi_nxv16i8_nxv16i8(<vscale x 16 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x i8> @llvm.riscv.vrgather.vx.nxv16i8.iXLen(
- <vscale x 16 x i8> undef,
+ <vscale x 16 x i8> poison,
<vscale x 16 x i8> %0,
iXLen 9,
iXLen %1)
@@ -3742,7 +3742,7 @@ define <vscale x 32 x i8> @intrinsic_vrgather_vi_nxv32i8_nxv32i8(<vscale x 32 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x i8> @llvm.riscv.vrgather.vx.nxv32i8.iXLen(
- <vscale x 32 x i8> undef,
+ <vscale x 32 x i8> poison,
<vscale x 32 x i8> %0,
iXLen 9,
iXLen %1)
@@ -3776,7 +3776,7 @@ define <vscale x 64 x i8> @intrinsic_vrgather_vi_nxv64i8_nxv64i8(<vscale x 64 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 64 x i8> @llvm.riscv.vrgather.vx.nxv64i8.iXLen(
- <vscale x 64 x i8> undef,
+ <vscale x 64 x i8> poison,
<vscale x 64 x i8> %0,
iXLen 9,
iXLen %1)
@@ -3810,7 +3810,7 @@ define <vscale x 1 x i16> @intrinsic_vrgather_vi_nxv1i16_nxv1i16(<vscale x 1 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i16> @llvm.riscv.vrgather.vx.nxv1i16.iXLen(
- <vscale x 1 x i16> undef,
+ <vscale x 1 x i16> poison,
<vscale x 1 x i16> %0,
iXLen 9,
iXLen %1)
@@ -3844,7 +3844,7 @@ define <vscale x 2 x i16> @intrinsic_vrgather_vi_nxv2i16_nxv2i16(<vscale x 2 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i16> @llvm.riscv.vrgather.vx.nxv2i16.iXLen(
- <vscale x 2 x i16> undef,
+ <vscale x 2 x i16> poison,
<vscale x 2 x i16> %0,
iXLen 9,
iXLen %1)
@@ -3878,7 +3878,7 @@ define <vscale x 4 x i16> @intrinsic_vrgather_vi_nxv4i16_nxv4i16(<vscale x 4 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i16> @llvm.riscv.vrgather.vx.nxv4i16.iXLen(
- <vscale x 4 x i16> undef,
+ <vscale x 4 x i16> poison,
<vscale x 4 x i16> %0,
iXLen 9,
iXLen %1)
@@ -3912,7 +3912,7 @@ define <vscale x 8 x i16> @intrinsic_vrgather_vi_nxv8i16_nxv8i16(<vscale x 8 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i16> @llvm.riscv.vrgather.vx.nxv8i16.iXLen(
- <vscale x 8 x i16> undef,
+ <vscale x 8 x i16> poison,
<vscale x 8 x i16> %0,
iXLen 9,
iXLen %1)
@@ -3946,7 +3946,7 @@ define <vscale x 16 x i16> @intrinsic_vrgather_vi_nxv16i16_nxv16i16(<vscale x 16
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x i16> @llvm.riscv.vrgather.vx.nxv16i16.iXLen(
- <vscale x 16 x i16> undef,
+ <vscale x 16 x i16> poison,
<vscale x 16 x i16> %0,
iXLen 9,
iXLen %1)
@@ -3980,7 +3980,7 @@ define <vscale x 32 x i16> @intrinsic_vrgather_vi_nxv32i16_nxv32i16(<vscale x 32
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x i16> @llvm.riscv.vrgather.vx.nxv32i16.iXLen(
- <vscale x 32 x i16> undef,
+ <vscale x 32 x i16> poison,
<vscale x 32 x i16> %0,
iXLen 9,
iXLen %1)
@@ -4014,7 +4014,7 @@ define <vscale x 1 x i32> @intrinsic_vrgather_vi_nxv1i32_nxv1i32(<vscale x 1 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i32> @llvm.riscv.vrgather.vx.nxv1i32.iXLen(
- <vscale x 1 x i32> undef,
+ <vscale x 1 x i32> poison,
<vscale x 1 x i32> %0,
iXLen 9,
iXLen %1)
@@ -4048,7 +4048,7 @@ define <vscale x 2 x i32> @intrinsic_vrgather_vi_nxv2i32_nxv2i32(<vscale x 2 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i32> @llvm.riscv.vrgather.vx.nxv2i32.iXLen(
- <vscale x 2 x i32> undef,
+ <vscale x 2 x i32> poison,
<vscale x 2 x i32> %0,
iXLen 9,
iXLen %1)
@@ -4082,7 +4082,7 @@ define <vscale x 4 x i32> @intrinsic_vrgather_vi_nxv4i32_nxv4i32(<vscale x 4 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i32> @llvm.riscv.vrgather.vx.nxv4i32.iXLen(
- <vscale x 4 x i32> undef,
+ <vscale x 4 x i32> poison,
<vscale x 4 x i32> %0,
iXLen 9,
iXLen %1)
@@ -4116,7 +4116,7 @@ define <vscale x 8 x i32> @intrinsic_vrgather_vi_nxv8i32_nxv8i32(<vscale x 8 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i32> @llvm.riscv.vrgather.vx.nxv8i32.iXLen(
- <vscale x 8 x i32> undef,
+ <vscale x 8 x i32> poison,
<vscale x 8 x i32> %0,
iXLen 9,
iXLen %1)
@@ -4150,7 +4150,7 @@ define <vscale x 16 x i32> @intrinsic_vrgather_vi_nxv16i32_nxv16i32(<vscale x 16
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x i32> @llvm.riscv.vrgather.vx.nxv16i32.iXLen(
- <vscale x 16 x i32> undef,
+ <vscale x 16 x i32> poison,
<vscale x 16 x i32> %0,
iXLen 9,
iXLen %1)
@@ -4184,7 +4184,7 @@ define <vscale x 1 x i64> @intrinsic_vrgather_vi_nxv1i64_nxv1i64(<vscale x 1 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i64> @llvm.riscv.vrgather.vx.nxv1i64.iXLen(
- <vscale x 1 x i64> undef,
+ <vscale x 1 x i64> poison,
<vscale x 1 x i64> %0,
iXLen 9,
iXLen %1)
@@ -4218,7 +4218,7 @@ define <vscale x 2 x i64> @intrinsic_vrgather_vi_nxv2i64_nxv2i64(<vscale x 2 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i64> @llvm.riscv.vrgather.vx.nxv2i64.iXLen(
- <vscale x 2 x i64> undef,
+ <vscale x 2 x i64> poison,
<vscale x 2 x i64> %0,
iXLen 9,
iXLen %1)
@@ -4252,7 +4252,7 @@ define <vscale x 4 x i64> @intrinsic_vrgather_vi_nxv4i64_nxv4i64(<vscale x 4 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i64> @llvm.riscv.vrgather.vx.nxv4i64.iXLen(
- <vscale x 4 x i64> undef,
+ <vscale x 4 x i64> poison,
<vscale x 4 x i64> %0,
iXLen 9,
iXLen %1)
@@ -4286,7 +4286,7 @@ define <vscale x 8 x i64> @intrinsic_vrgather_vi_nxv8i64_nxv8i64(<vscale x 8 x i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i64> @llvm.riscv.vrgather.vx.nxv8i64.iXLen(
- <vscale x 8 x i64> undef,
+ <vscale x 8 x i64> poison,
<vscale x 8 x i64> %0,
iXLen 9,
iXLen %1)
@@ -4320,7 +4320,7 @@ define <vscale x 1 x half> @intrinsic_vrgather_vi_nxv1f16_nxv1f16(<vscale x 1 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x half> @llvm.riscv.vrgather.vx.nxv1f16.iXLen(
- <vscale x 1 x half> undef,
+ <vscale x 1 x half> poison,
<vscale x 1 x half> %0,
iXLen 9,
iXLen %1)
@@ -4354,7 +4354,7 @@ define <vscale x 2 x half> @intrinsic_vrgather_vi_nxv2f16_nxv2f16(<vscale x 2 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x half> @llvm.riscv.vrgather.vx.nxv2f16.iXLen(
- <vscale x 2 x half> undef,
+ <vscale x 2 x half> poison,
<vscale x 2 x half> %0,
iXLen 9,
iXLen %1)
@@ -4388,7 +4388,7 @@ define <vscale x 4 x half> @intrinsic_vrgather_vi_nxv4f16_nxv4f16(<vscale x 4 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x half> @llvm.riscv.vrgather.vx.nxv4f16.iXLen(
- <vscale x 4 x half> undef,
+ <vscale x 4 x half> poison,
<vscale x 4 x half> %0,
iXLen 9,
iXLen %1)
@@ -4422,7 +4422,7 @@ define <vscale x 8 x half> @intrinsic_vrgather_vi_nxv8f16_nxv8f16(<vscale x 8 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x half> @llvm.riscv.vrgather.vx.nxv8f16.iXLen(
- <vscale x 8 x half> undef,
+ <vscale x 8 x half> poison,
<vscale x 8 x half> %0,
iXLen 9,
iXLen %1)
@@ -4456,7 +4456,7 @@ define <vscale x 16 x half> @intrinsic_vrgather_vi_nxv16f16_nxv16f16(<vscale x 1
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x half> @llvm.riscv.vrgather.vx.nxv16f16.iXLen(
- <vscale x 16 x half> undef,
+ <vscale x 16 x half> poison,
<vscale x 16 x half> %0,
iXLen 9,
iXLen %1)
@@ -4490,7 +4490,7 @@ define <vscale x 32 x half> @intrinsic_vrgather_vi_nxv32f16_nxv32f16(<vscale x 3
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x half> @llvm.riscv.vrgather.vx.nxv32f16.iXLen(
- <vscale x 32 x half> undef,
+ <vscale x 32 x half> poison,
<vscale x 32 x half> %0,
iXLen 9,
iXLen %1)
@@ -4524,7 +4524,7 @@ define <vscale x 1 x float> @intrinsic_vrgather_vi_nxv1f32_nxv1f32(<vscale x 1 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x float> @llvm.riscv.vrgather.vx.nxv1f32.iXLen(
- <vscale x 1 x float> undef,
+ <vscale x 1 x float> poison,
<vscale x 1 x float> %0,
iXLen 9,
iXLen %1)
@@ -4558,7 +4558,7 @@ define <vscale x 2 x float> @intrinsic_vrgather_vi_nxv2f32_nxv2f32(<vscale x 2 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x float> @llvm.riscv.vrgather.vx.nxv2f32.iXLen(
- <vscale x 2 x float> undef,
+ <vscale x 2 x float> poison,
<vscale x 2 x float> %0,
iXLen 9,
iXLen %1)
@@ -4592,7 +4592,7 @@ define <vscale x 4 x float> @intrinsic_vrgather_vi_nxv4f32_nxv4f32(<vscale x 4 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x float> @llvm.riscv.vrgather.vx.nxv4f32.iXLen(
- <vscale x 4 x float> undef,
+ <vscale x 4 x float> poison,
<vscale x 4 x float> %0,
iXLen 9,
iXLen %1)
@@ -4626,7 +4626,7 @@ define <vscale x 8 x float> @intrinsic_vrgather_vi_nxv8f32_nxv8f32(<vscale x 8 x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x float> @llvm.riscv.vrgather.vx.nxv8f32.iXLen(
- <vscale x 8 x float> undef,
+ <vscale x 8 x float> poison,
<vscale x 8 x float> %0,
iXLen 9,
iXLen %1)
@@ -4660,7 +4660,7 @@ define <vscale x 16 x float> @intrinsic_vrgather_vi_nxv16f32_nxv16f32(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x float> @llvm.riscv.vrgather.vx.nxv16f32.iXLen(
- <vscale x 16 x float> undef,
+ <vscale x 16 x float> poison,
<vscale x 16 x float> %0,
iXLen 9,
iXLen %1)
@@ -4694,7 +4694,7 @@ define <vscale x 1 x double> @intrinsic_vrgather_vi_nxv1f64_nxv1f64(<vscale x 1
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x double> @llvm.riscv.vrgather.vx.nxv1f64.iXLen(
- <vscale x 1 x double> undef,
+ <vscale x 1 x double> poison,
<vscale x 1 x double> %0,
iXLen 9,
iXLen %1)
@@ -4728,7 +4728,7 @@ define <vscale x 2 x double> @intrinsic_vrgather_vi_nxv2f64_nxv2f64(<vscale x 2
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x double> @llvm.riscv.vrgather.vx.nxv2f64.iXLen(
- <vscale x 2 x double> undef,
+ <vscale x 2 x double> poison,
<vscale x 2 x double> %0,
iXLen 9,
iXLen %1)
@@ -4762,7 +4762,7 @@ define <vscale x 4 x double> @intrinsic_vrgather_vi_nxv4f64_nxv4f64(<vscale x 4
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x double> @llvm.riscv.vrgather.vx.nxv4f64.iXLen(
- <vscale x 4 x double> undef,
+ <vscale x 4 x double> poison,
<vscale x 4 x double> %0,
iXLen 9,
iXLen %1)
@@ -4796,7 +4796,7 @@ define <vscale x 8 x double> @intrinsic_vrgather_vi_nxv8f64_nxv8f64(<vscale x 8
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x double> @llvm.riscv.vrgather.vx.nxv8f64.iXLen(
- <vscale x 8 x double> undef,
+ <vscale x 8 x double> poison,
<vscale x 8 x double> %0,
iXLen 9,
iXLen %1)
@@ -4836,7 +4836,7 @@ define <vscale x 1 x bfloat> @intrinsic_vrgather_vv_nxv1bf16_nxv1bf16_nxv1i16(<v
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x bfloat> @llvm.riscv.vrgather.vv.nxv1bf16.iXLen(
- <vscale x 1 x bfloat> undef,
+ <vscale x 1 x bfloat> poison,
<vscale x 1 x bfloat> %0,
<vscale x 1 x i16> %1,
iXLen %2)
@@ -4884,7 +4884,7 @@ define <vscale x 2 x bfloat> @intrinsic_vrgather_vv_nxv2bf16_nxv2bf16_nxv2i16(<v
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x bfloat> @llvm.riscv.vrgather.vv.nxv2bf16.iXLen(
- <vscale x 2 x bfloat> undef,
+ <vscale x 2 x bfloat> poison,
<vscale x 2 x bfloat> %0,
<vscale x 2 x i16> %1,
iXLen %2)
@@ -4932,7 +4932,7 @@ define <vscale x 4 x bfloat> @intrinsic_vrgather_vv_nxv4bf16_nxv4bf16_nxv4i16(<v
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x bfloat> @llvm.riscv.vrgather.vv.nxv4bf16.iXLen(
- <vscale x 4 x bfloat> undef,
+ <vscale x 4 x bfloat> poison,
<vscale x 4 x bfloat> %0,
<vscale x 4 x i16> %1,
iXLen %2)
@@ -4980,7 +4980,7 @@ define <vscale x 8 x bfloat> @intrinsic_vrgather_vv_nxv8bf16_nxv8bf16_nxv8i16(<v
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x bfloat> @llvm.riscv.vrgather.vv.nxv8bf16.iXLen(
- <vscale x 8 x bfloat> undef,
+ <vscale x 8 x bfloat> poison,
<vscale x 8 x bfloat> %0,
<vscale x 8 x i16> %1,
iXLen %2)
@@ -5028,7 +5028,7 @@ define <vscale x 16 x bfloat> @intrinsic_vrgather_vv_nxv16bf16_nxv16bf16_nxv16i1
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x bfloat> @llvm.riscv.vrgather.vv.nxv16bf16.iXLen(
- <vscale x 16 x bfloat> undef,
+ <vscale x 16 x bfloat> poison,
<vscale x 16 x bfloat> %0,
<vscale x 16 x i16> %1,
iXLen %2)
@@ -5076,7 +5076,7 @@ define <vscale x 32 x bfloat> @intrinsic_vrgather_vv_nxv32bf16_nxv32bf16_nxv32i1
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x bfloat> @llvm.riscv.vrgather.vv.nxv32bf16.iXLen(
- <vscale x 32 x bfloat> undef,
+ <vscale x 32 x bfloat> poison,
<vscale x 32 x bfloat> %0,
<vscale x 32 x i16> %1,
iXLen %2)
@@ -5125,7 +5125,7 @@ define <vscale x 1 x bfloat> @intrinsic_vrgather_vx_nxv1bf16_nxv1bf16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x bfloat> @llvm.riscv.vrgather.vx.nxv1bf16.iXLen(
- <vscale x 1 x bfloat> undef,
+ <vscale x 1 x bfloat> poison,
<vscale x 1 x bfloat> %0,
iXLen %1,
iXLen %2)
@@ -5173,7 +5173,7 @@ define <vscale x 2 x bfloat> @intrinsic_vrgather_vx_nxv2bf16_nxv2bf16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x bfloat> @llvm.riscv.vrgather.vx.nxv2bf16.iXLen(
- <vscale x 2 x bfloat> undef,
+ <vscale x 2 x bfloat> poison,
<vscale x 2 x bfloat> %0,
iXLen %1,
iXLen %2)
@@ -5221,7 +5221,7 @@ define <vscale x 4 x bfloat> @intrinsic_vrgather_vx_nxv4bf16_nxv4bf16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x bfloat> @llvm.riscv.vrgather.vx.nxv4bf16.iXLen(
- <vscale x 4 x bfloat> undef,
+ <vscale x 4 x bfloat> poison,
<vscale x 4 x bfloat> %0,
iXLen %1,
iXLen %2)
@@ -5269,7 +5269,7 @@ define <vscale x 8 x bfloat> @intrinsic_vrgather_vx_nxv8bf16_nxv8bf16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x bfloat> @llvm.riscv.vrgather.vx.nxv8bf16.iXLen(
- <vscale x 8 x bfloat> undef,
+ <vscale x 8 x bfloat> poison,
<vscale x 8 x bfloat> %0,
iXLen %1,
iXLen %2)
@@ -5317,7 +5317,7 @@ define <vscale x 16 x bfloat> @intrinsic_vrgather_vx_nxv16bf16_nxv16bf16(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x bfloat> @llvm.riscv.vrgather.vx.nxv16bf16.iXLen(
- <vscale x 16 x bfloat> undef,
+ <vscale x 16 x bfloat> poison,
<vscale x 16 x bfloat> %0,
iXLen %1,
iXLen %2)
@@ -5365,7 +5365,7 @@ define <vscale x 32 x bfloat> @intrinsic_vrgather_vx_nxv32bf16_nxv32bf16(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x bfloat> @llvm.riscv.vrgather.vx.nxv32bf16.iXLen(
- <vscale x 32 x bfloat> undef,
+ <vscale x 32 x bfloat> poison,
<vscale x 32 x bfloat> %0,
iXLen %1,
iXLen %2)
@@ -5407,7 +5407,7 @@ define <vscale x 1 x bfloat> @intrinsic_vrgather_vi_nxv1bf16_nxv1bf16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x bfloat> @llvm.riscv.vrgather.vx.nxv1bf16.iXLen(
- <vscale x 1 x bfloat> undef,
+ <vscale x 1 x bfloat> poison,
<vscale x 1 x bfloat> %0,
iXLen 9,
iXLen %1)
@@ -5441,7 +5441,7 @@ define <vscale x 2 x bfloat> @intrinsic_vrgather_vi_nxv2bf16_nxv2bf16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x bfloat> @llvm.riscv.vrgather.vx.nxv2bf16.iXLen(
- <vscale x 2 x bfloat> undef,
+ <vscale x 2 x bfloat> poison,
<vscale x 2 x bfloat> %0,
iXLen 9,
iXLen %1)
@@ -5475,7 +5475,7 @@ define <vscale x 4 x bfloat> @intrinsic_vrgather_vi_nxv4bf16_nxv4bf16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x bfloat> @llvm.riscv.vrgather.vx.nxv4bf16.iXLen(
- <vscale x 4 x bfloat> undef,
+ <vscale x 4 x bfloat> poison,
<vscale x 4 x bfloat> %0,
iXLen 9,
iXLen %1)
@@ -5509,7 +5509,7 @@ define <vscale x 8 x bfloat> @intrinsic_vrgather_vi_nxv8bf16_nxv8bf16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x bfloat> @llvm.riscv.vrgather.vx.nxv8bf16.iXLen(
- <vscale x 8 x bfloat> undef,
+ <vscale x 8 x bfloat> poison,
<vscale x 8 x bfloat> %0,
iXLen 9,
iXLen %1)
@@ -5543,7 +5543,7 @@ define <vscale x 16 x bfloat> @intrinsic_vrgather_vi_nxv16bf16_nxv16bf16(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x bfloat> @llvm.riscv.vrgather.vx.nxv16bf16.iXLen(
- <vscale x 16 x bfloat> undef,
+ <vscale x 16 x bfloat> poison,
<vscale x 16 x bfloat> %0,
iXLen 9,
iXLen %1)
@@ -5577,7 +5577,7 @@ define <vscale x 32 x bfloat> @intrinsic_vrgather_vi_nxv32bf16_nxv32bf16(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x bfloat> @llvm.riscv.vrgather.vx.nxv32bf16.iXLen(
- <vscale x 32 x bfloat> undef,
+ <vscale x 32 x bfloat> poison,
<vscale x 32 x bfloat> %0,
iXLen 9,
iXLen %1)
generated by cgit v1.2.3 (git 2.25.1) at 2026-05-31 14:55:19 +0000