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Diffstat (limited to 'llvm/test/CodeGen/RISCV/rvv/vlse.ll')
-rw-r--r--llvm/test/CodeGen/RISCV/rvv/vlse.ll86
1 files changed, 43 insertions, 43 deletions
diff --git a/llvm/test/CodeGen/RISCV/rvv/vlse.ll b/llvm/test/CodeGen/RISCV/rvv/vlse.ll
index 3dcd254d0c19..ac7be3021e63 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vlse.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vlse.ll
@@ -18,7 +18,7 @@ define <vscale x 1 x i64> @intrinsic_vlse_v_nxv1i64_nxv1i64(ptr %0, iXLen %1, iX
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i64> @llvm.riscv.vlse.nxv1i64(
- <vscale x 1 x i64> undef,
+ <vscale x 1 x i64> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -65,7 +65,7 @@ define <vscale x 2 x i64> @intrinsic_vlse_v_nxv2i64_nxv2i64(ptr %0, iXLen %1, iX
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i64> @llvm.riscv.vlse.nxv2i64(
- <vscale x 2 x i64> undef,
+ <vscale x 2 x i64> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -112,7 +112,7 @@ define <vscale x 4 x i64> @intrinsic_vlse_v_nxv4i64_nxv4i64(ptr %0, iXLen %1, iX
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i64> @llvm.riscv.vlse.nxv4i64(
- <vscale x 4 x i64> undef,
+ <vscale x 4 x i64> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -159,7 +159,7 @@ define <vscale x 8 x i64> @intrinsic_vlse_v_nxv8i64_nxv8i64(ptr %0, iXLen %1, iX
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i64> @llvm.riscv.vlse.nxv8i64(
- <vscale x 8 x i64> undef,
+ <vscale x 8 x i64> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -206,7 +206,7 @@ define <vscale x 1 x double> @intrinsic_vlse_v_nxv1f64_nxv1f64(ptr %0, iXLen %1,
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x double> @llvm.riscv.vlse.nxv1f64(
- <vscale x 1 x double> undef,
+ <vscale x 1 x double> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -253,7 +253,7 @@ define <vscale x 2 x double> @intrinsic_vlse_v_nxv2f64_nxv2f64(ptr %0, iXLen %1,
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x double> @llvm.riscv.vlse.nxv2f64(
- <vscale x 2 x double> undef,
+ <vscale x 2 x double> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -300,7 +300,7 @@ define <vscale x 4 x double> @intrinsic_vlse_v_nxv4f64_nxv4f64(ptr %0, iXLen %1,
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x double> @llvm.riscv.vlse.nxv4f64(
- <vscale x 4 x double> undef,
+ <vscale x 4 x double> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -347,7 +347,7 @@ define <vscale x 8 x double> @intrinsic_vlse_v_nxv8f64_nxv8f64(ptr %0, iXLen %1,
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x double> @llvm.riscv.vlse.nxv8f64(
- <vscale x 8 x double> undef,
+ <vscale x 8 x double> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -394,7 +394,7 @@ define <vscale x 1 x i32> @intrinsic_vlse_v_nxv1i32_nxv1i32(ptr %0, iXLen %1, iX
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i32> @llvm.riscv.vlse.nxv1i32(
- <vscale x 1 x i32> undef,
+ <vscale x 1 x i32> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -441,7 +441,7 @@ define <vscale x 2 x i32> @intrinsic_vlse_v_nxv2i32_nxv2i32(ptr %0, iXLen %1, iX
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i32> @llvm.riscv.vlse.nxv2i32(
- <vscale x 2 x i32> undef,
+ <vscale x 2 x i32> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -488,7 +488,7 @@ define <vscale x 4 x i32> @intrinsic_vlse_v_nxv4i32_nxv4i32(ptr %0, iXLen %1, iX
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i32> @llvm.riscv.vlse.nxv4i32(
- <vscale x 4 x i32> undef,
+ <vscale x 4 x i32> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -535,7 +535,7 @@ define <vscale x 8 x i32> @intrinsic_vlse_v_nxv8i32_nxv8i32(ptr %0, iXLen %1, iX
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i32> @llvm.riscv.vlse.nxv8i32(
- <vscale x 8 x i32> undef,
+ <vscale x 8 x i32> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -582,7 +582,7 @@ define <vscale x 16 x i32> @intrinsic_vlse_v_nxv16i32_nxv16i32(ptr %0, iXLen %1,
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x i32> @llvm.riscv.vlse.nxv16i32(
- <vscale x 16 x i32> undef,
+ <vscale x 16 x i32> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -629,7 +629,7 @@ define <vscale x 1 x float> @intrinsic_vlse_v_nxv1f32_nxv1f32(ptr %0, iXLen %1,
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x float> @llvm.riscv.vlse.nxv1f32(
- <vscale x 1 x float> undef,
+ <vscale x 1 x float> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -676,7 +676,7 @@ define <vscale x 2 x float> @intrinsic_vlse_v_nxv2f32_nxv2f32(ptr %0, iXLen %1,
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x float> @llvm.riscv.vlse.nxv2f32(
- <vscale x 2 x float> undef,
+ <vscale x 2 x float> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -723,7 +723,7 @@ define <vscale x 4 x float> @intrinsic_vlse_v_nxv4f32_nxv4f32(ptr %0, iXLen %1,
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x float> @llvm.riscv.vlse.nxv4f32(
- <vscale x 4 x float> undef,
+ <vscale x 4 x float> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -770,7 +770,7 @@ define <vscale x 8 x float> @intrinsic_vlse_v_nxv8f32_nxv8f32(ptr %0, iXLen %1,
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x float> @llvm.riscv.vlse.nxv8f32(
- <vscale x 8 x float> undef,
+ <vscale x 8 x float> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -817,7 +817,7 @@ define <vscale x 16 x float> @intrinsic_vlse_v_nxv16f32_nxv16f32(ptr %0, iXLen %
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x float> @llvm.riscv.vlse.nxv16f32(
- <vscale x 16 x float> undef,
+ <vscale x 16 x float> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -864,7 +864,7 @@ define <vscale x 1 x i16> @intrinsic_vlse_v_nxv1i16_nxv1i16(ptr %0, iXLen %1, iX
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i16> @llvm.riscv.vlse.nxv1i16(
- <vscale x 1 x i16> undef,
+ <vscale x 1 x i16> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -911,7 +911,7 @@ define <vscale x 2 x i16> @intrinsic_vlse_v_nxv2i16_nxv2i16(ptr %0, iXLen %1, iX
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i16> @llvm.riscv.vlse.nxv2i16(
- <vscale x 2 x i16> undef,
+ <vscale x 2 x i16> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -958,7 +958,7 @@ define <vscale x 4 x i16> @intrinsic_vlse_v_nxv4i16_nxv4i16(ptr %0, iXLen %1, iX
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i16> @llvm.riscv.vlse.nxv4i16(
- <vscale x 4 x i16> undef,
+ <vscale x 4 x i16> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1005,7 +1005,7 @@ define <vscale x 8 x i16> @intrinsic_vlse_v_nxv8i16_nxv8i16(ptr %0, iXLen %1, iX
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i16> @llvm.riscv.vlse.nxv8i16(
- <vscale x 8 x i16> undef,
+ <vscale x 8 x i16> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1052,7 +1052,7 @@ define <vscale x 16 x i16> @intrinsic_vlse_v_nxv16i16_nxv16i16(ptr %0, iXLen %1,
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x i16> @llvm.riscv.vlse.nxv16i16(
- <vscale x 16 x i16> undef,
+ <vscale x 16 x i16> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1099,7 +1099,7 @@ define <vscale x 32 x i16> @intrinsic_vlse_v_nxv32i16_nxv32i16(ptr %0, iXLen %1,
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x i16> @llvm.riscv.vlse.nxv32i16(
- <vscale x 32 x i16> undef,
+ <vscale x 32 x i16> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1146,7 +1146,7 @@ define <vscale x 1 x half> @intrinsic_vlse_v_nxv1f16_nxv1f16(ptr %0, iXLen %1, i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x half> @llvm.riscv.vlse.nxv1f16(
- <vscale x 1 x half> undef,
+ <vscale x 1 x half> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1193,7 +1193,7 @@ define <vscale x 2 x half> @intrinsic_vlse_v_nxv2f16_nxv2f16(ptr %0, iXLen %1, i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x half> @llvm.riscv.vlse.nxv2f16(
- <vscale x 2 x half> undef,
+ <vscale x 2 x half> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1240,7 +1240,7 @@ define <vscale x 4 x half> @intrinsic_vlse_v_nxv4f16_nxv4f16(ptr %0, iXLen %1, i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x half> @llvm.riscv.vlse.nxv4f16(
- <vscale x 4 x half> undef,
+ <vscale x 4 x half> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1287,7 +1287,7 @@ define <vscale x 8 x half> @intrinsic_vlse_v_nxv8f16_nxv8f16(ptr %0, iXLen %1, i
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x half> @llvm.riscv.vlse.nxv8f16(
- <vscale x 8 x half> undef,
+ <vscale x 8 x half> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1334,7 +1334,7 @@ define <vscale x 16 x half> @intrinsic_vlse_v_nxv16f16_nxv16f16(ptr %0, iXLen %1
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x half> @llvm.riscv.vlse.nxv16f16(
- <vscale x 16 x half> undef,
+ <vscale x 16 x half> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1381,7 +1381,7 @@ define <vscale x 32 x half> @intrinsic_vlse_v_nxv32f16_nxv32f16(ptr %0, iXLen %1
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x half> @llvm.riscv.vlse.nxv32f16(
- <vscale x 32 x half> undef,
+ <vscale x 32 x half> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1428,7 +1428,7 @@ define <vscale x 1 x bfloat> @intrinsic_vlse_v_nxv1bf16_nxv1bf16(ptr %0, iXLen %
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x bfloat> @llvm.riscv.vlse.nxv1bf16(
- <vscale x 1 x bfloat> undef,
+ <vscale x 1 x bfloat> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1475,7 +1475,7 @@ define <vscale x 2 x bfloat> @intrinsic_vlse_v_nxv2bf16_nxv2bf16(ptr %0, iXLen %
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x bfloat> @llvm.riscv.vlse.nxv2bf16(
- <vscale x 2 x bfloat> undef,
+ <vscale x 2 x bfloat> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1522,7 +1522,7 @@ define <vscale x 4 x bfloat> @intrinsic_vlse_v_nxv4bf16_nxv4bf16(ptr %0, iXLen %
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x bfloat> @llvm.riscv.vlse.nxv4bf16(
- <vscale x 4 x bfloat> undef,
+ <vscale x 4 x bfloat> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1569,7 +1569,7 @@ define <vscale x 8 x bfloat> @intrinsic_vlse_v_nxv8bf16_nxv8bf16(ptr %0, iXLen %
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x bfloat> @llvm.riscv.vlse.nxv8bf16(
- <vscale x 8 x bfloat> undef,
+ <vscale x 8 x bfloat> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1616,7 +1616,7 @@ define <vscale x 16 x bfloat> @intrinsic_vlse_v_nxv16bf16_nxv16bf16(ptr %0, iXLe
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x bfloat> @llvm.riscv.vlse.nxv16bf16(
- <vscale x 16 x bfloat> undef,
+ <vscale x 16 x bfloat> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1663,7 +1663,7 @@ define <vscale x 32 x bfloat> @intrinsic_vlse_v_nxv32bf16_nxv32bf16(ptr %0, iXLe
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x bfloat> @llvm.riscv.vlse.nxv32bf16(
- <vscale x 32 x bfloat> undef,
+ <vscale x 32 x bfloat> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1710,7 +1710,7 @@ define <vscale x 1 x i8> @intrinsic_vlse_v_nxv1i8_nxv1i8(ptr %0, iXLen %1, iXLen
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x i8> @llvm.riscv.vlse.nxv1i8(
- <vscale x 1 x i8> undef,
+ <vscale x 1 x i8> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1757,7 +1757,7 @@ define <vscale x 2 x i8> @intrinsic_vlse_v_nxv2i8_nxv2i8(ptr %0, iXLen %1, iXLen
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x i8> @llvm.riscv.vlse.nxv2i8(
- <vscale x 2 x i8> undef,
+ <vscale x 2 x i8> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1804,7 +1804,7 @@ define <vscale x 4 x i8> @intrinsic_vlse_v_nxv4i8_nxv4i8(ptr %0, iXLen %1, iXLen
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x i8> @llvm.riscv.vlse.nxv4i8(
- <vscale x 4 x i8> undef,
+ <vscale x 4 x i8> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1851,7 +1851,7 @@ define <vscale x 8 x i8> @intrinsic_vlse_v_nxv8i8_nxv8i8(ptr %0, iXLen %1, iXLen
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x i8> @llvm.riscv.vlse.nxv8i8(
- <vscale x 8 x i8> undef,
+ <vscale x 8 x i8> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1898,7 +1898,7 @@ define <vscale x 16 x i8> @intrinsic_vlse_v_nxv16i8_nxv16i8(ptr %0, iXLen %1, iX
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x i8> @llvm.riscv.vlse.nxv16i8(
- <vscale x 16 x i8> undef,
+ <vscale x 16 x i8> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1945,7 +1945,7 @@ define <vscale x 32 x i8> @intrinsic_vlse_v_nxv32i8_nxv32i8(ptr %0, iXLen %1, iX
; CHECK-NEXT: ret
entry:
%a = call <vscale x 32 x i8> @llvm.riscv.vlse.nxv32i8(
- <vscale x 32 x i8> undef,
+ <vscale x 32 x i8> poison,
ptr %0,
iXLen %1,
iXLen %2)
@@ -1992,7 +1992,7 @@ define <vscale x 64 x i8> @intrinsic_vlse_v_nxv64i8_nxv64i8(ptr %0, iXLen %1, iX
; CHECK-NEXT: ret
entry:
%a = call <vscale x 64 x i8> @llvm.riscv.vlse.nxv64i8(
- <vscale x 64 x i8> undef,
+ <vscale x 64 x i8> poison,
ptr %0,
iXLen %1,
iXLen %2)
generated by cgit v1.2.3 (git 2.25.1) at 2026-05-31 14:55:12 +0000