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Diffstat (limited to 'llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll')
-rw-r--r--llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll52
1 files changed, 26 insertions, 26 deletions
diff --git a/llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll b/llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll
index ab45345a7a39..7facc0ad483d 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll
@@ -20,7 +20,7 @@ define <vscale x 1 x float> @intrinsic_vfwsub.w_wv_nxv1f32_nxv1f32_nxv1f16(<vsca
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x float> @llvm.riscv.vfwsub.w.nxv1f32.nxv1f16(
- <vscale x 1 x float> undef,
+ <vscale x 1 x float> poison,
<vscale x 1 x float> %0,
<vscale x 1 x half> %1,
iXLen 0, iXLen %2)
@@ -70,7 +70,7 @@ define <vscale x 2 x float> @intrinsic_vfwsub.w_wv_nxv2f32_nxv2f32_nxv2f16(<vsca
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x float> @llvm.riscv.vfwsub.w.nxv2f32.nxv2f16(
- <vscale x 2 x float> undef,
+ <vscale x 2 x float> poison,
<vscale x 2 x float> %0,
<vscale x 2 x half> %1,
iXLen 0, iXLen %2)
@@ -120,7 +120,7 @@ define <vscale x 4 x float> @intrinsic_vfwsub.w_wv_nxv4f32_nxv4f32_nxv4f16(<vsca
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x float> @llvm.riscv.vfwsub.w.nxv4f32.nxv4f16(
- <vscale x 4 x float> undef,
+ <vscale x 4 x float> poison,
<vscale x 4 x float> %0,
<vscale x 4 x half> %1,
iXLen 0, iXLen %2)
@@ -170,7 +170,7 @@ define <vscale x 8 x float> @intrinsic_vfwsub.w_wv_nxv8f32_nxv8f32_nxv8f16(<vsca
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x float> @llvm.riscv.vfwsub.w.nxv8f32.nxv8f16(
- <vscale x 8 x float> undef,
+ <vscale x 8 x float> poison,
<vscale x 8 x float> %0,
<vscale x 8 x half> %1,
iXLen 0, iXLen %2)
@@ -220,7 +220,7 @@ define <vscale x 16 x float> @intrinsic_vfwsub.w_wv_nxv16f32_nxv16f32_nxv16f16(<
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x float> @llvm.riscv.vfwsub.w.nxv16f32.nxv16f16(
- <vscale x 16 x float> undef,
+ <vscale x 16 x float> poison,
<vscale x 16 x float> %0,
<vscale x 16 x half> %1,
iXLen 0, iXLen %2)
@@ -271,7 +271,7 @@ define <vscale x 1 x double> @intrinsic_vfwsub.w_wv_nxv1f64_nxv1f64_nxv1f32(<vsc
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x double> @llvm.riscv.vfwsub.w.nxv1f64.nxv1f32(
- <vscale x 1 x double> undef,
+ <vscale x 1 x double> poison,
<vscale x 1 x double> %0,
<vscale x 1 x float> %1,
iXLen 0, iXLen %2)
@@ -321,7 +321,7 @@ define <vscale x 2 x double> @intrinsic_vfwsub.w_wv_nxv2f64_nxv2f64_nxv2f32(<vsc
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x double> @llvm.riscv.vfwsub.w.nxv2f64.nxv2f32(
- <vscale x 2 x double> undef,
+ <vscale x 2 x double> poison,
<vscale x 2 x double> %0,
<vscale x 2 x float> %1,
iXLen 0, iXLen %2)
@@ -371,7 +371,7 @@ define <vscale x 4 x double> @intrinsic_vfwsub.w_wv_nxv4f64_nxv4f64_nxv4f32(<vsc
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x double> @llvm.riscv.vfwsub.w.nxv4f64.nxv4f32(
- <vscale x 4 x double> undef,
+ <vscale x 4 x double> poison,
<vscale x 4 x double> %0,
<vscale x 4 x float> %1,
iXLen 0, iXLen %2)
@@ -421,7 +421,7 @@ define <vscale x 8 x double> @intrinsic_vfwsub.w_wv_nxv8f64_nxv8f64_nxv8f32(<vsc
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x double> @llvm.riscv.vfwsub.w.nxv8f64.nxv8f32(
- <vscale x 8 x double> undef,
+ <vscale x 8 x double> poison,
<vscale x 8 x double> %0,
<vscale x 8 x float> %1,
iXLen 0, iXLen %2)
@@ -472,7 +472,7 @@ define <vscale x 1 x float> @intrinsic_vfwsub.w_wf_nxv1f32_nxv1f32_f16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x float> @llvm.riscv.vfwsub.w.nxv1f32.f16(
- <vscale x 1 x float> undef,
+ <vscale x 1 x float> poison,
<vscale x 1 x float> %0,
half %1,
iXLen 0, iXLen %2)
@@ -522,7 +522,7 @@ define <vscale x 2 x float> @intrinsic_vfwsub.w_wf_nxv2f32_nxv2f32_f16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x float> @llvm.riscv.vfwsub.w.nxv2f32.f16(
- <vscale x 2 x float> undef,
+ <vscale x 2 x float> poison,
<vscale x 2 x float> %0,
half %1,
iXLen 0, iXLen %2)
@@ -572,7 +572,7 @@ define <vscale x 4 x float> @intrinsic_vfwsub.w_wf_nxv4f32_nxv4f32_f16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x float> @llvm.riscv.vfwsub.w.nxv4f32.f16(
- <vscale x 4 x float> undef,
+ <vscale x 4 x float> poison,
<vscale x 4 x float> %0,
half %1,
iXLen 0, iXLen %2)
@@ -622,7 +622,7 @@ define <vscale x 8 x float> @intrinsic_vfwsub.w_wf_nxv8f32_nxv8f32_f16(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x float> @llvm.riscv.vfwsub.w.nxv8f32.f16(
- <vscale x 8 x float> undef,
+ <vscale x 8 x float> poison,
<vscale x 8 x float> %0,
half %1,
iXLen 0, iXLen %2)
@@ -672,7 +672,7 @@ define <vscale x 16 x float> @intrinsic_vfwsub.w_wf_nxv16f32_nxv16f32_f16(<vscal
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x float> @llvm.riscv.vfwsub.w.nxv16f32.f16(
- <vscale x 16 x float> undef,
+ <vscale x 16 x float> poison,
<vscale x 16 x float> %0,
half %1,
iXLen 0, iXLen %2)
@@ -722,7 +722,7 @@ define <vscale x 1 x double> @intrinsic_vfwsub.w_wf_nxv1f64_nxv1f64_f32(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x double> @llvm.riscv.vfwsub.w.nxv1f64.f32(
- <vscale x 1 x double> undef,
+ <vscale x 1 x double> poison,
<vscale x 1 x double> %0,
float %1,
iXLen 0, iXLen %2)
@@ -772,7 +772,7 @@ define <vscale x 2 x double> @intrinsic_vfwsub.w_wf_nxv2f64_nxv2f64_f32(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x double> @llvm.riscv.vfwsub.w.nxv2f64.f32(
- <vscale x 2 x double> undef,
+ <vscale x 2 x double> poison,
<vscale x 2 x double> %0,
float %1,
iXLen 0, iXLen %2)
@@ -822,7 +822,7 @@ define <vscale x 4 x double> @intrinsic_vfwsub.w_wf_nxv4f64_nxv4f64_f32(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x double> @llvm.riscv.vfwsub.w.nxv4f64.f32(
- <vscale x 4 x double> undef,
+ <vscale x 4 x double> poison,
<vscale x 4 x double> %0,
float %1,
iXLen 0, iXLen %2)
@@ -872,7 +872,7 @@ define <vscale x 8 x double> @intrinsic_vfwsub.w_wf_nxv8f64_nxv8f64_f32(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x double> @llvm.riscv.vfwsub.w.nxv8f64.f32(
- <vscale x 8 x double> undef,
+ <vscale x 8 x double> poison,
<vscale x 8 x double> %0,
float %1,
iXLen 0, iXLen %2)
@@ -1259,7 +1259,7 @@ define <vscale x 1 x float> @intrinsic_vfwsub.w_wv_untie_nxv1f32_nxv1f32_nxv1f16
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x float> @llvm.riscv.vfwsub.w.nxv1f32.nxv1f16(
- <vscale x 1 x float> undef,
+ <vscale x 1 x float> poison,
<vscale x 1 x float> %1,
<vscale x 1 x half> %0,
iXLen 0, iXLen %2)
@@ -1278,7 +1278,7 @@ define <vscale x 2 x float> @intrinsic_vfwsub.w_wv_untie_nxv2f32_nxv2f32_nxv2f16
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x float> @llvm.riscv.vfwsub.w.nxv2f32.nxv2f16(
- <vscale x 2 x float> undef,
+ <vscale x 2 x float> poison,
<vscale x 2 x float> %1,
<vscale x 2 x half> %0,
iXLen 0, iXLen %2)
@@ -1297,7 +1297,7 @@ define <vscale x 4 x float> @intrinsic_vfwsub.w_wv_untie_nxv4f32_nxv4f32_nxv4f16
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x float> @llvm.riscv.vfwsub.w.nxv4f32.nxv4f16(
- <vscale x 4 x float> undef,
+ <vscale x 4 x float> poison,
<vscale x 4 x float> %1,
<vscale x 4 x half> %0,
iXLen 0, iXLen %2)
@@ -1316,7 +1316,7 @@ define <vscale x 8 x float> @intrinsic_vfwsub.w_wv_untie_nxv8f32_nxv8f32_nxv8f16
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x float> @llvm.riscv.vfwsub.w.nxv8f32.nxv8f16(
- <vscale x 8 x float> undef,
+ <vscale x 8 x float> poison,
<vscale x 8 x float> %1,
<vscale x 8 x half> %0,
iXLen 0, iXLen %2)
@@ -1335,7 +1335,7 @@ define <vscale x 1 x double> @intrinsic_vfwsub.w_wv_untie_nxv1f64_nxv1f64_nxv1f3
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x double> @llvm.riscv.vfwsub.w.nxv1f64.nxv1f32(
- <vscale x 1 x double> undef,
+ <vscale x 1 x double> poison,
<vscale x 1 x double> %1,
<vscale x 1 x float> %0,
iXLen 0, iXLen %2)
@@ -1354,7 +1354,7 @@ define <vscale x 2 x double> @intrinsic_vfwsub.w_wv_untie_nxv2f64_nxv2f64_nxv2f3
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x double> @llvm.riscv.vfwsub.w.nxv2f64.nxv2f32(
- <vscale x 2 x double> undef,
+ <vscale x 2 x double> poison,
<vscale x 2 x double> %1,
<vscale x 2 x float> %0,
iXLen 0, iXLen %2)
@@ -1373,7 +1373,7 @@ define <vscale x 4 x double> @intrinsic_vfwsub.w_wv_untie_nxv4f64_nxv4f64_nxv4f3
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x double> @llvm.riscv.vfwsub.w.nxv4f64.nxv4f32(
- <vscale x 4 x double> undef,
+ <vscale x 4 x double> poison,
<vscale x 4 x double> %1,
<vscale x 4 x float> %0,
iXLen 0, iXLen %2)
@@ -1392,7 +1392,7 @@ define <vscale x 8 x double> @intrinsic_vfwsub.w_wv_untie_nxv8f64_nxv8f64_nxv8f3
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x double> @llvm.riscv.vfwsub.w.nxv8f64.nxv8f32(
- <vscale x 8 x double> undef,
+ <vscale x 8 x double> poison,
<vscale x 8 x double> %1,
<vscale x 8 x float> %0,
iXLen 0, iXLen %2)