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Diffstat (limited to 'llvm/test/CodeGen/RISCV/rvv/vfwmul.ll')
-rw-r--r--llvm/test/CodeGen/RISCV/rvv/vfwmul.ll36
1 files changed, 18 insertions, 18 deletions
diff --git a/llvm/test/CodeGen/RISCV/rvv/vfwmul.ll b/llvm/test/CodeGen/RISCV/rvv/vfwmul.ll
index d16c418cbf77..f3a2bbd2ea14 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vfwmul.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vfwmul.ll
@@ -21,7 +21,7 @@ define <vscale x 1 x float> @intrinsic_vfwmul_vv_nxv1f32_nxv1f16_nxv1f16(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x float> @llvm.riscv.vfwmul.nxv1f32.nxv1f16.nxv1f16(
- <vscale x 1 x float> undef,
+ <vscale x 1 x float> poison,
<vscale x 1 x half> %0,
<vscale x 1 x half> %1,
iXLen 0, iXLen %2)
@@ -72,7 +72,7 @@ define <vscale x 2 x float> @intrinsic_vfwmul_vv_nxv2f32_nxv2f16_nxv2f16(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x float> @llvm.riscv.vfwmul.nxv2f32.nxv2f16.nxv2f16(
- <vscale x 2 x float> undef,
+ <vscale x 2 x float> poison,
<vscale x 2 x half> %0,
<vscale x 2 x half> %1,
iXLen 0, iXLen %2)
@@ -124,7 +124,7 @@ define <vscale x 4 x float> @intrinsic_vfwmul_vv_nxv4f32_nxv4f16_nxv4f16(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x float> @llvm.riscv.vfwmul.nxv4f32.nxv4f16.nxv4f16(
- <vscale x 4 x float> undef,
+ <vscale x 4 x float> poison,
<vscale x 4 x half> %0,
<vscale x 4 x half> %1,
iXLen 0, iXLen %2)
@@ -176,7 +176,7 @@ define <vscale x 8 x float> @intrinsic_vfwmul_vv_nxv8f32_nxv8f16_nxv8f16(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x float> @llvm.riscv.vfwmul.nxv8f32.nxv8f16.nxv8f16(
- <vscale x 8 x float> undef,
+ <vscale x 8 x float> poison,
<vscale x 8 x half> %0,
<vscale x 8 x half> %1,
iXLen 0, iXLen %2)
@@ -228,7 +228,7 @@ define <vscale x 16 x float> @intrinsic_vfwmul_vv_nxv16f32_nxv16f16_nxv16f16(<vs
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x float> @llvm.riscv.vfwmul.nxv16f32.nxv16f16.nxv16f16(
- <vscale x 16 x float> undef,
+ <vscale x 16 x float> poison,
<vscale x 16 x half> %0,
<vscale x 16 x half> %1,
iXLen 0, iXLen %2)
@@ -279,7 +279,7 @@ define <vscale x 1 x double> @intrinsic_vfwmul_vv_nxv1f64_nxv1f32_nxv1f32(<vscal
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x double> @llvm.riscv.vfwmul.nxv1f64.nxv1f32.nxv1f32(
- <vscale x 1 x double> undef,
+ <vscale x 1 x double> poison,
<vscale x 1 x float> %0,
<vscale x 1 x float> %1,
iXLen 0, iXLen %2)
@@ -331,7 +331,7 @@ define <vscale x 2 x double> @intrinsic_vfwmul_vv_nxv2f64_nxv2f32_nxv2f32(<vscal
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x double> @llvm.riscv.vfwmul.nxv2f64.nxv2f32.nxv2f32(
- <vscale x 2 x double> undef,
+ <vscale x 2 x double> poison,
<vscale x 2 x float> %0,
<vscale x 2 x float> %1,
iXLen 0, iXLen %2)
@@ -383,7 +383,7 @@ define <vscale x 4 x double> @intrinsic_vfwmul_vv_nxv4f64_nxv4f32_nxv4f32(<vscal
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x double> @llvm.riscv.vfwmul.nxv4f64.nxv4f32.nxv4f32(
- <vscale x 4 x double> undef,
+ <vscale x 4 x double> poison,
<vscale x 4 x float> %0,
<vscale x 4 x float> %1,
iXLen 0, iXLen %2)
@@ -435,7 +435,7 @@ define <vscale x 8 x double> @intrinsic_vfwmul_vv_nxv8f64_nxv8f32_nxv8f32(<vscal
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x double> @llvm.riscv.vfwmul.nxv8f64.nxv8f32.nxv8f32(
- <vscale x 8 x double> undef,
+ <vscale x 8 x double> poison,
<vscale x 8 x float> %0,
<vscale x 8 x float> %1,
iXLen 0, iXLen %2)
@@ -486,7 +486,7 @@ define <vscale x 1 x float> @intrinsic_vfwmul_vf_nxv1f32_nxv1f16_f16(<vscale x 1
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x float> @llvm.riscv.vfwmul.nxv1f32.nxv1f16.f16(
- <vscale x 1 x float> undef,
+ <vscale x 1 x float> poison,
<vscale x 1 x half> %0,
half %1,
iXLen 0, iXLen %2)
@@ -537,7 +537,7 @@ define <vscale x 2 x float> @intrinsic_vfwmul_vf_nxv2f32_nxv2f16_f16(<vscale x 2
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x float> @llvm.riscv.vfwmul.nxv2f32.nxv2f16.f16(
- <vscale x 2 x float> undef,
+ <vscale x 2 x float> poison,
<vscale x 2 x half> %0,
half %1,
iXLen 0, iXLen %2)
@@ -588,7 +588,7 @@ define <vscale x 4 x float> @intrinsic_vfwmul_vf_nxv4f32_nxv4f16_f16(<vscale x 4
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x float> @llvm.riscv.vfwmul.nxv4f32.nxv4f16.f16(
- <vscale x 4 x float> undef,
+ <vscale x 4 x float> poison,
<vscale x 4 x half> %0,
half %1,
iXLen 0, iXLen %2)
@@ -639,7 +639,7 @@ define <vscale x 8 x float> @intrinsic_vfwmul_vf_nxv8f32_nxv8f16_f16(<vscale x 8
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x float> @llvm.riscv.vfwmul.nxv8f32.nxv8f16.f16(
- <vscale x 8 x float> undef,
+ <vscale x 8 x float> poison,
<vscale x 8 x half> %0,
half %1,
iXLen 0, iXLen %2)
@@ -690,7 +690,7 @@ define <vscale x 16 x float> @intrinsic_vfwmul_vf_nxv16f32_nxv16f16_f16(<vscale
; CHECK-NEXT: ret
entry:
%a = call <vscale x 16 x float> @llvm.riscv.vfwmul.nxv16f32.nxv16f16.f16(
- <vscale x 16 x float> undef,
+ <vscale x 16 x float> poison,
<vscale x 16 x half> %0,
half %1,
iXLen 0, iXLen %2)
@@ -741,7 +741,7 @@ define <vscale x 1 x double> @intrinsic_vfwmul_vf_nxv1f64_nxv1f32_f32(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 1 x double> @llvm.riscv.vfwmul.nxv1f64.nxv1f32.f32(
- <vscale x 1 x double> undef,
+ <vscale x 1 x double> poison,
<vscale x 1 x float> %0,
float %1,
iXLen 0, iXLen %2)
@@ -792,7 +792,7 @@ define <vscale x 2 x double> @intrinsic_vfwmul_vf_nxv2f64_nxv2f32_f32(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 2 x double> @llvm.riscv.vfwmul.nxv2f64.nxv2f32.f32(
- <vscale x 2 x double> undef,
+ <vscale x 2 x double> poison,
<vscale x 2 x float> %0,
float %1,
iXLen 0, iXLen %2)
@@ -843,7 +843,7 @@ define <vscale x 4 x double> @intrinsic_vfwmul_vf_nxv4f64_nxv4f32_f32(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 4 x double> @llvm.riscv.vfwmul.nxv4f64.nxv4f32.f32(
- <vscale x 4 x double> undef,
+ <vscale x 4 x double> poison,
<vscale x 4 x float> %0,
float %1,
iXLen 0, iXLen %2)
@@ -894,7 +894,7 @@ define <vscale x 8 x double> @intrinsic_vfwmul_vf_nxv8f64_nxv8f32_f32(<vscale x
; CHECK-NEXT: ret
entry:
%a = call <vscale x 8 x double> @llvm.riscv.vfwmul.nxv8f64.nxv8f32.f32(
- <vscale x 8 x double> undef,
+ <vscale x 8 x double> poison,
<vscale x 8 x float> %0,
float %1,
iXLen 0, iXLen %2)
generated by cgit v1.2.3 (git 2.25.1) at 2026-05-31 14:54:51 +0000